نتایج جستجو برای: synchronous digital hierarchy

تعداد نتایج: 391579  

Journal: :پژوهش های تولید گیاهی 0
حسین کاظمی عضو هیات علمی دانشگاه علوم کشاورزی و منابع طبیعی گرگان

geographic information system (gis) and analytical hierarchy process (ahp) were applied to ecological zoning of current agricultural lands in gorgan for sunflower cultivation. for this purpose, agro-ecological requirements of sunflower firstly, identified according to scientific resources. rating and thematic requirement maps were then provided. studied environmental-components were: average, m...

2011
René van Leuken Tom Van Leeuwen Huib Lincklaen Arriens

This paper presents a toolbox for the automatic generation of asynchronous circuits starting from a data flow graph description. The toolbox consists of a scheduling and code generation tool. We use traditional scheduling algorithms as for synchronous circuits, but have replaced the implied synchronous controller for an asynchronous distributed control network. The control circuit allows for tr...

1998
S. Prabhakar J. Fox H. Hindi D. Teytelman A. Young

A novel beam-based method for measuring the longitudinal impedance spectrum is demonstrated using experimental data from the PEP-II High Energy Ring (HER). The method uses a digital longitudinal feedback system from which the charge and synchronous phase are measured for every bucket. Calculation of the transfer function from ll shape to synchronous phase yields the impedance seen by the beam a...

Journal: :Int. J. Hum.-Comput. Stud. 2009
Nirmal J. Patel James Clawson Amy Voida Kent Lyons

Photographs have always been artifacts for creating memories and engaging in storytelling activities with others. To date there has been much research in the HCI community towards sharing of both analog and digital photographs. With recent advances in network technology further research has been done with photos being shared almost immediately after capture. However, most of the research has fo...

2013
Neelam R. Prakash

In this paper clock gating technique is presented for low power VLSI (very large scale integration) circuit design. Clock in digital circuits is used for synchronization of various components. Clock power is a major source of dynamic power consumed in synchronous circuits. Clock-gating is a well-known technique to reduce clock power. In clock gating clock to an idle block is disabled. Thus sign...

2002
Won-Bae Park

Digital Cross-Connect System (DCS), used for distributing and crossconnecting the synchronous optical and asynchronous electrical signals, plays very important role as transmission equipment in the transport networks, is The performance evaluation of the switch matrix of the DCS by simulation methods will require a realistic traffic model generating practical connection and disconnection demand...

2016
Harpreet Singh Sukhwinder Singh

This research paper gives the introduction of the various clock gating techniques. It also provides the basic clock gating principles, benefits, limitations and enhancements in traditional clock gating scheme. Also it provides the details of parameters which can affect the implementation of the clock gating. As clock signal having great source of power consumption and this is a critical problem...

2006
Zhonghai Lu Ingo Sander Axel Jantsch

We present a novel approach to refine a system model specified with perfectly synchronous communication onto a Network-on-Chip (NoC) best-effort communication service. It is a top-down procedure with three steps, namely, channel refinement, process refinement, and communication mapping. In channel refinement, synchronous channels are replaced with stochastic channels abstracting the best-effort...

1995
Jianfeng Shao Ramesh Harjani

Hierarchy plays a signi cant role in the design of digital and analog circuits. At each level of the hierarchy it becomes essential to evaluate if a sub-block design is feasible and if so which design style is the best candidate for the particular problem. This paper proposes a general methodology for evaluating the feasibility and the performance of sub-blocks at all levels of the hierarchy. A...

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