Problem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: Th...

<p class="Correspondencedetails"><span lang="EN-US">The router is a network device that used to connect subnetwork and packet-switched networking by directing the data packets intended IP addresses. It succeeds traffic between different systems allows several devices share internet connection. The applicable for effective commutation in system on chip (SoC) modules (NoC) communicati...

This paper presents optimized implementations of two different pipeline FFT processors on Xilinx Spartan-3 and Virtex-4 FPGAs. Different optimization techniques and rounding schemes were explored. The implementation results achieved better performance with lower resource usage than prior art. The 16-bit 1024-point FFT with the R22SDF architecture had amaximum clock frequency of 95.2 MHz and use...

En el presente trabajo se describe la implementación y ensayo de un demodulador FSK, en marco Re-Ingeniería modem para comunicaciones navales. El mismo desarrolló sobre una FPGA Spartan 6 XCSLX25 con su código VHDL. Para las pruebas realizaron modulaciones microcontrolador STM32F407 donde agregaron distintos niveles ruido poner a prueba sistema.