In order to design high performance sigma-delta A/D converters, it is essential to estimate the Figure-Of-Merit in the design process. This paper describes the design of a power/performance efficient single-loop multibit sigmadelta modulator for wireless applications. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. A 3 order 4-bit Σ-∆ m...

In this paper we present a method for stability analysis of high order Sigma-Delta modulators. The method is based on a parallel decomposition of the modulator. Using this presentation the general N-th order modulator could be considered as made up of N first order modulators, which interact only through the quantizer function. The decomposition helps us to extract the stability conditions of t...

In this paper, a dual-branch topology driven by a Delta-Sigma Modulator (DSM) with a complex quantizer, also known as the Complex Delta Sigma Modulator (CxDSM), with a 3-level quantized output signal is proposed. By de-multiplexing the 3-level Delta-Sigma-quantized signal into two bi-level streams, an efficiency enhancement over the operational frequency range is achieved. The de-multiplexed si...

The work deals with the design of the 12-bit Delta-Sigma () modulator using switched capacitors (SC) technique. The modulator serves to vibration sensor output processing. The first part describes the modulator parameters definition. Results of the proposed topology ideal model were presented as well. Next, the  modulator circuitry on the transistor level was done. The ONSemiconductor I...

The transition from the system level to the transistor level design of sigma delta modulator involves degradation in performance due to circuit imperfections, the extent of which depends on the architecture. A systematic understanding of the sensitivity is essential to accomplish a robust design. Smart behavioral modeling allows us to compare architectures and to derive minimum specifications f...

A recent sigma-delta modulator architecture incorporates spectral shaping of hardware-mismatch errors through redundancy introduced by embedding the input/output subspace in a higher-dimensional space for loop operation. Here basic design issues for the key vector quantizer and matriximpulse-response loop filter are explored. A simple design example and simulation illustrate.

A third-order sigma-delta (Σ -Δ ) modulator implementation in a Digital Power Amplifier is presented in this paper. The operation is obtained by using a novel combination of architectural features, proper circuit structure selections, specific clocking strategies, and efficient circuit optimization algorithms. Measurement results from fabricated CMOS chip prototypes show a good match with simul...

This paper presents a third-order Sigma-Delta modulator that uses only two operational amplifiers. A fully digital solution reduces both amplifiers output swings. This design achieves complex conjugate zeros that allows obtaining a signal-to-noise ratio of about 8 dB better than having all the zeros placed at z = 1. Behavioral level simulations demonstrate the effectiveness of the approach.

The inherent bistability and picosecond time-scale switching of the resonant tunneling diode (RTD) provides an ideal element for the design of digital circuits and analog signal quantizers in the 10-100 GHz domain. New differential RTD-based circuits for quantizers and a first-order Sigma-Delta modulator capable of operating at 10 GHz and beyond are