Based on the concepts of cascade multilevel converters and one-cycle technique, comparisons are conducted to characterize the distortion of the pulsewidth modulation (PWM) and one-cycle control methods that were applied to converters. Simulation results for the different control schemes are obtained in PSIM software initially to see the effect of one-cycle control different from that of PWM con...

PWM inverters are widely used in UPS systems and driving induction motors. They give AC sinusoidal voltage under linear or non-linear loads which is a basic tracking control problem. Since the duty cycle of a PWM inverter is unchanged within one switching period, inverters are very suitable to be represented by discrete-time state equations. A discrete-time sliding-mode controller based on an i...

A CMOS class D phase locked loop based PWM generator is presented in this paper. The implementation is done in a 90nm CMOS process using CADENCE tool. The architecture in this project eliminates the requirements for a high-quality carrier generator and a high-speed voltage comparator that are often required in PWM implementations. Voltage comparison is replaced by Phase comparison and precise r...

Euler-Lagrange (EL) model of voltage source PWM rectifier is set up based on its model in synchronous dq coordinates. Passivity based controller is designed on the basis of passivity and EL model of voltage source PWM rectifier. Three switching function are educed by passivity based controller. A switching function is only realized in engineering consequently. Voltage source PWM rectifier using...

 When utilized at low amplitude modulation indices, existing multilevel carrier-based PWM strategies have no special provisions for this operating region, and several levels of the inverter go unused. This paper proposes some novel multilevel PWM strategies to take advantage of the multiple levels in both a diode-clamped inverter and a cascaded Hbridges inverter by utilizing all of the levels ...

In this paper, the influence on the load capacitance value of the adiabatic dynamic CMOS logic (ADCL) is examined. The adiabatic operation and reduction effect of power consumption are confirmed using LTspice with 0.18μm standard MOS model. Furthermore, the 3-bit digital PWM using ADCL without voltage holding capacitance (CS) was simulated for the organic light emitting diodes (OLEDs) dimming s...

This paper proposes the simplification of the synthesis method of PWM pattern by using the Walsh function. The digital nature of the Walsh function makes the relation between the Walsh spectrum and PWM pattern to be a linear algebraic equation. Thus the synthesis becomes straightforward. It is the remarkable feature of the proposed method over a conventional method using Fourier series expansio...

This in vitro study was conducted to evaluate lymphocyte blastogenic and cytokine production by bovine peripheral blood mononuclear cells (PBMCs) stimulated with phytohemagglutinin (PHA), pokeweed mitogen (PWM) and concanavalin A (Con A) mitogens, by using tetrazolium salt and ELISA tests, respectively. The results presented that  Interleukin-2 (IL-2), IL-4, IL-5, IL-10, IL-17 and IFN-...