In modern CMOS technologies, power consumption is becoming a significant challenge for the integrated circuits industry. Accurate estimation of power dissipation is very important during micro-architectural design of every computational structure. This work presents the methodology we intent to use in future investigations regarding power consumption of the SARC architecture. SARC project is ta...

Most power reduction techniques have focused on gating the clock to unused functional units to minimize static power consumption, while system level optimizations have been used to deal with dynamic power consumption. After these techniques are applied, register file power consumption becomes a dominant factor in the energy consumption. This paper proposes a power-aware reconfiguration mechanis...

Power consumption is one of the major concerns in modern embedded computing systems. On-chip caches represent a sizeable fractions of the total power consumption of microprocessors. Its reduction is becoming fundamental to develop both low-power and high-performance systems. Although large caches can improve performance, they equally increase the power consumption. The operation frequency and t...

Base stations represent the main contributor to the energy consumption of a mobile cellular network. Since traffic load in mobile networks significantly varies during a working or weekend day, it is important to quantify the influence of these variations on the base station power consumption. Therefore, this paper investigates changes in the instantaneous power consumption of GSM (Global System...

In any integrated circuit power consumption plays a paramount role and is considered as one of the top challenges in International technology roadmap for semiconductors. In this paper, a low power circuit designed to operate in subthreshold region is proposed. Voltage scaling technique is incorporated to reduce dynamic power consumption while static or leakage power is greatly reduced with forc...

The development of FPGA-based digital signal processing devices has been gaining attention. Researchers seek to reduce power consumption and enhance signal processing quality in these devices with given resources and spatial limits. Hence, there is a need to investigate both the capability and the power consumption associated with the various digital filtering schemes commonly used in FPGA-base...