نتایج جستجو برای: pd soi
تعداد نتایج: 62400 فیلتر نتایج به سال:
We investigated the frequency dependences of Y22 of FDSOI MOSFETs, in which the drain current response delay is observed for the first time. Short channel FD-SOI devices operating in linear region show significant drain current response delay. It is confirmed that FD-SOI MOSFET’s RF behavior can be well reproduced with the proposed model including the drain current response delay.
We propose a design for high quality factor two-dimensional (2D) photonic crystal cavities on silicon-on-insulator (SOI). A quality factor of up to 1.2×10(7) with a modal volume of 2.35(λ/n)(3) is simulated. A very high quality factor of 200,000 is experimentally demonstrated for a 2D cavity fabricated on SOI.
Modeling and performance of on-chip spiral inductors is presented. Y-parameters are obtained from the measured S-parameters of the inductor fabricated in 0.35-μm SOI CMOS technology. Matlab is used to get the π-equivalent circuit model parameters at each frequency point. The SOI CMOS inductor shows better performance characteristics in terms of Q-factor and self-resonance frequency.
confirm benefits of a deep sub-micron FD-SOI and to identify possible issues concerning front-end circuits with the FD-SOI, we have submitted a small design to Oki Electric Industry Co., Ltd. via the multi-chip project service of VDEC, the University of Tokyo. The initial test results and future plans for development are presented.
Abstract When silicon-on-insulator p-type MOSFET (SOI-PMOS) functions like a capacitor-less 1T-DRAM cell, it is possible for the number of electrons to be sensed at cryogenic temperatures (5 K). We developed structure that combines n-type MOSFETs (SOI-NMOS) and SOI-PMOS with multiple gates form silicon quantum-dot array. In this structure, variable injected into body by means bucket-brigade ope...
The worst ease bias during total dose irradiation of partially depleted SOI transistors from two technologies is correlated to the device architecture. Experiments and simulations are used to analyze SOI back transistor threshold voltage shift and charge trapping in the buried oxide
The backreflection in commonly used grating couplers on silicon-on-insulator (SOI) is not negligible for many applications. This reflection is dramatically reduced in our improved compact grating coupler design, which directs the reflection away from the input waveguide. Realized devices on SOI show that the reflection can be reduced down to -50 dB without an apparent transmission penalty.
This paper reviews the recent advances in SOI digital CMOS circuits. Particular emphases is placed on the impact of floating-body in partially-depleted devices on the circuit operation, stability, and functionality. Unique SOI design aspects such as parasitic bipolar effect and hysteretic VT variation are addressed. Circuit techniques to improve the noise immunity and global design issues are a...
An important effect on the dynamics of spins in materials is the spin-orbit interaction (SOI), which reflects/arises from intrinsic lack of inversion symmetry in the lattice structure, or via broken symmetries in the system due to external or interfacial fields (Rashba interaction). Although intrinsic SOI is weak in graphene, the Rashba SOI can in fact be large due to strong local hybridization...
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