The design and measurements of a 200 GHz downconverter in 90 nm standard CMOS are presented. A positive conversion gain of +6.6 dB, a noise figure of 29.9 dB and an output bandwidth of 3 GHz are measured for an LO power of −14.9 dBm. The conversion gain remains within 3 dB for an RF frequency between 186 and 212 GHz. Downconversion of BPSK and QPSK signals is demonstrated with eye diagrams and ...

In this paper, we present the low noise amplifier using new feedback connection configurations. The UWB LNA is design in 0.18 m TSMC CMOS technique to achieve high gain, small size and low noise. The LNA achieved 11 dB of average power gain, low 2.87 dB noise figure (NF), -10.9 dB input match, -7 dB return loss, -3 dBm of IIP3 and only 0.54 mm size with 15 mW power consumption.

In this paper, a CMOS low-noise amplifier (LNA) with a new input matching topology has been proposed, analyzed and measured. The input matching network is designed through the technique of capacitive feedback matching network. The proposed LNA which is implemented in a 0:18-mm1P6M CMOS technology is operated at the frequency of 12.8GHz. It has a gain S21 of 13.2 dB, a noise figure (NF) of 4.57 ...

The technology behind the Electron-Multiplying Charge Coupled Device (EMCCD) was successfully exploited by e2v technologies in the late 1990s. Since then, many uses have been found for these low light level (L3) devices including surveillance and many scientific applications. The EMCCD increases or ‘multiplies’ the charge signal by the phenomenon of impact ionisation (or avalanche multiplicatio...

A low noise amplifier has been designed using a 2SK117 N channel J-FET as the input device in a cascode [1] configuration. Noise measurements on this amplifier yield a low frequency noise current of 0.25 fA/Yfu and a voltage noise of less than 1.2 n V NHz in the 500 Hz to 50 kHz region. Bloyet et al. [2] suggest a figure of merit of the product of the noise voltage and current as being appropri...

The design of a low noise figure (NF), high conversion gain (CG) double-balanced, Gilbert-cell mixer is presented. Since the noise figure of the RF CMOS mixer is strongly affected by flicker noise (1/f), a dynamic current injection technique is used to reduce the flicker noise corner frequency. The current injection circuitry comprises 3 pMOS to inject current pulses at the switching instants. ...

A low power and low-phase noise quadrature voltage controlled oscillator (QVCO) using the differential complementary Colpitts oscillator topology has been developed. A transformer inductor is used to form a differential output oscillator and the back-gate coupling technique is used to generate quadrature outputs. The advantage of proposed QVCO is analyzed in terms of power consumption, phase no...

This paper presents the theoretical specification of Spectrum Sensing Receiver used for Cognitive Radios. Its system level design is intended to comply with IEEE 802.22, IEEE 802.16 (Wimax) and LTE standards altogether. The operation frequency band is very wide, from 50MHz to 3.8GHz. Calculated specifications include noise figure, compression point, third order intercept point, sensitivity and ...

To achieve a wide dynamic range, the noise figure of the LNA and linearity of the mixer are of primary concern. Figure 2 shows the circuit schematic of the LNA. A differential architecture is chosen in anticipation of eventual integration of a complete GPS receiver. Its common mode rejection eases the task of rejecting interference from other on-chip elements, such as a DSP core. This choice re...