Because of the typically rather low trace element concentrations in biological samples XAS is collected in fluorescence mode with the help of a multi-element detector. In addition, several scans have to be accumulated and thus post-processing operations have to be carried out after the measurement, e.g. selecting good detector channels, checking for radiation damage, fitting of background and n...

We present RDFPRO (RDF Processor), an open source Java command line tool and embeddable library that offers a suite of stream-oriented, highly optimized processors for common tasks such as data filtering, RDFS inference, smushing and statistics extraction. RDFPRO processors are extensible by users and can be freely composed to form complex pipelines to efficiently process RDF data in one or mor...

The paper addresses the problem of mapping an application speciied as a task graph on a heterogeneous architecture which contains a software processor, a dynamically reconngurable hardware coprocessor and memory elements. The problem comprises of three sub-problems: partitioning of tasks between hardware and software, assigning tasks mapped on hardware to diierent temporal segments and scheduli...

Design of a programmable Multi core processor to implement compute several complex multimedia applications is presented. The Processor is expected to complete the given task with minimum latency. The hardware must adhere to minimal area and power requirements. This paper gives design details for enhancement of performance parameters of multi core processors. It is necessary to optimize the proc...

• To improve understanding of the application domain, in this case designers develop task models corresponding to the existing application and the modelling work can stimulate the request of many clarifications whose need may not be perceived just reading textual descriptions or documents; • To support effective design, in this case designers develop an envisioned task model of a new applicatio...

However, for the parallelization of tasks not necessarily a multi-core processor is required. Hardware multithreading, for example, is an approach that enables parallelization also for single-core processors. Here, we deal with a basic problem of cores with pipeline architecture: cache misses or data dependencies between the instructions mean that the pipelined instruction processing has to be ...

Task compaction has been examined as a means of reducing fragmentation in par titionable machines based on multi stage hypercube mesh and linear array inter connection networks Ordered partial task compaction involves moving a subset of executing tasks without permuting their relative order to accommodate a request for a large submesh that would otherwise be blocked from entering the system In ...

This paper examines the effects of multithreaded pipelining on the CPI (cycles per instruction) of a RISC processor. The desired CPI in a conventional (single-threaded) RISC processor is one instruction per cycle. However, the CPI is typically more than one because of data hazards, control hazards, and resource hazards in the pipeline. A multi-threaded processor performs a context switch betwee...

In real-time environments, tasks have to complete by their deadlines. As we restrict our attention to mono-processor systems, a scheduling algorithm aims to determine which task is to execute on the processor [1,2]. On-line scheduling algorithms have been designed under non-overloaded conditions. We say that a real-time system is overloaded when it is impossible to schedule it on the processor ...

In this work, we present a multi-camera surveillance system based on the use of self-organizing neural networks to represent events on video. The system processes several tasks in parallel using GPUs (graphic processor units). It addresses multiple vision tasks at various levels, such as segmentation, representation or characterization, analysis and monitoring of the movement. These features al...