Earlier, a theory was introduced that enabled a method of scalable logic synthesis. In this method, given a circuit N1 and its partition into subcircuits N1 , i=1,..k, an optimized circuit N2 functionally equivalent to N1 is built by replacing each subcircuit N1 i with a toggle equivalent counterpart N2 . To implement this method in practice, one needs a procedure that, given a multi-output sub...

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Relatively little information has been published on Coyotes in the eastern United States, particularly in the mid-Atlantic region, the last area of the contiguous US to be colonized by Coyotes. Increases in eastern Coyote distribution and abundance have been documented, and concerns about their impact on wildlife and livestock are growing. Information from published and unpublished manuscripts,...

This paper proposes a fast algorithm for Boolean matching of completely specified Boolean functions. The algorithm can be applied on-the-fly to millions of small practical functions appearing in industrial designs, leading to runtime and memory reduction in logic synthesis and technology mapping. The algorithm is conceptually simpler, faster, and more scalable than previous work.

Repeated modular additions and overflow detection are possible in redundant hybrid number systems (RHNS). In this paper a circuit is proposed that implements the overflow-detecting procedure in such systems and allows a mean addition time of about 10.5 gate delays for numbers having a magnitude order normally distributed in the range [−233, 233 − 1], versus a 14 gate delay required by 32-bit CL...

One of the crucial problems multi-level logic synthesis techniques for multi-output boolean functions f =

The teaching of digital design requires a design platform which presents a coherent design methodology to the students. Yet we found ourselves with diflerent tools and hardware subsystems, each having its own idea about what digital design was about. Here we record our eflort t o forge a single design platform for beginning designers from three separate software subsystems and two hardware subs...

Achim G. Ho mann University of New South Wales School of Cumputer Science and Engineering P.O. Box 1, Kensington, Sydney, NSW 2033, Australia Abstract A new strategy for layout synthesis is presented. The GGADS system which uses the strategy has been implemented and is capable of designing layouts for congurable gate array master structures. GGADS evaluates the e ectiveness of layouts on gate a...