نتایج جستجو برای: layered t gate

تعداد نتایج: 776318  

Journal: :iranian journal of mechanical engineering transactions of the isme 2015
f. moayyedian m. kadkhodayan

in this paper to predict the critical conditions for onset of elastic-plastic wrinkling of flange of a two-layered circular blank during the deep-drawing process a closed-form semi-analytical elastic-plastic solution using tresca yield criterion alongwith deformation theory in plasticity with considernig the perfectly plastic behaviour of materials is presented. simplifying the presented soluti...

Journal: :Physical Review A 2021

The reversible implementation of classical functions accounts for the bulk most known quantum algorithms. As a result, number circuit constructions over Clifford+$T$ gate set have been developed in recent years which use both state and phase spaces, or $X$ $Z$ bases, to reduce costs beyond what is possible at strictly level. We study generalize two particular classes these constructions: relati...

2011
A Westphal

We are developing a biomimetic robot based on the Sea Lamprey. The robot consists of a cylindrical electronics bay propelled by an undulatory body axis. Shape memory alloy (SMA) actuators generate propagating flexion waves in five undulatory segments of a polyurethane strip. The behavior of the robot is controlled by an electronic nervous system (ENS) composed of networks of discrete-time map-b...

Journal: :CoRR 2017
Dmitri Maslov

In this paper we improve the layered implementation of arbitrary stabilizer circuits introduced by Aaronson and Gottesman in Phys. Rev. A 70(052328), 2004. In particular, we reduce their 11-stage computation -H-C-P-C-P-C-H-P-C-P-Cinto an 8-stage computation of the form -H-CCZ-P-H-P-CZ-C-. We show arguments in support of using -CZstages over the -Cstages: not only the use of -CZstages allows a s...

2012
C. Dean I. Meric T. Taniguchi

insulating substrates such as SiO2 are highly disordered, exhibiting characteristics that are far inferior to the expected intrinsic properties of graphene. We have developed a novel technique for substrate engineering of graphene devices using layered dielectric materials to build graphene based vertical heterostructures. We employ hBN, an insulating isomorph of graphite, as a substrate and ga...

2014
D. Michael Miller Mathias Soeken Rolf Drechsler

The need to consider fault tolerance in quantum circuits has led to recent work on the optimization of circuits composed of Clifford+T gates. The primary optimization objectives are to minimize the T -count (number of T gates) and the T -depth (the number of groupings of parallel T gates). These objectives arise due to the high cost of the fault tolerant implementation of the T gate compared to...

1977
J. Prager Paul A. Nagin Ralf R. Kohler Allen R. Hanson Edward M. Riseman

In VISIONS the segmentation a lgor i thms receive input from a d i g i t i z e d co lo r image as an array of p i x e l va lues , and generate output as a layered graph of symbo l i ca l l y named reg ions , boundaries, and endpoints — each w i t h t h e i r desc r i p t i ve a t t r i b u t e s . This processed sensory data provides the i n i t i a l input to the model -bu i ld ing system of V...

2014
Alec AK Nielsen Christopher A Voigt

Genetic circuits require many regulatory parts in order to implement signal processing or execute algorithms in cells. A potentially scalable approach is to use dCas9, which employs small guide RNAs (sgRNAs) to repress genetic loci via the programmability of RNA:DNA base pairing. To this end, we use dCas9 and designed sgRNAs to build transcriptional logic gates and connect them to perform compu...

2008
Jose Mauricio Marulanda Prado Ana Lucia Prado de Marulanda Ashwani K. Sharma Rajendra K. Nahar

and To my sisters Lyna Maria and Ana Maritza Without their patience, understanding support and most of all love, the completion of this dissertation would not have been possible. iii ACKOWLEDGMENTS My thanks and special appreciation to my advisor and mentor Dr. Ashok Srivastava. I am very thankful for his guidance, patience and understanding throughout my dissertation research. I would have not...

In this work, the design and analysis of new Level Shifter with Gate Driver for Li-Ion battery charger is proposed for high speed and low area in 180nm CMOS technology. The new proposed level shifter is used to raise the voltage level and significantly reduces transfer delay 1.3ns (transfer delay of conventional level shifter) to 0.15ns with the same input signal. Also, the level shifter with g...

نمودار تعداد نتایج جستجو در هر سال

با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید