Abstrucf-Multiple instruction rollback (MIR) is a technique that has been implemented in mainframe computers to provide rapid recovery from transient processor failures. Hardwarebased MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs have also been developed which remove rollback data hazards directly with data-flow tran...

Hardware verification and sequemio/ leSI genera/ion are aspects of the same problem. namely /0 prove the equal behavior determined by two circuit descriptions. During test generatjon, this altempi succeeds for the faulty and fault free circuil if redundancy exisis, and during verification it succeeds. if the implemenlofion is correct with regard to ils specification. This observation can be use...

We have developed a mobile thin-client server named ”HTTP-FUSE-KNOPPIX-BOX” that incorporates mechanisms for increasing performance, distributing load, and providing fault tolerance to achieve a practical HTTP-FUSE-KNOPPIX-based thin-client environment for mobile systems and other environments with limited hardware resources such as CPU and memory. Software RAID raises file input/output perform...

Embedded systems with high dependability requirements have to satisfy ever-growing demands for high computing performance, number of implemented features and cost-efficiency. This leads to a move to commercial off-the-shelf hardware components. At the same time, the number of faults in embedded systems increases due to shrinking hardware feature sizes and increasing software complexity. In orde...

background:  little is known about trends and predictors of hardware related infection following open reduction and internal fixation (orif) of extremity fractures, one of the major causes of failure following orif. the present study was designed and conducted to determine trends and predictors of infection-related hardware removal following orif of extremities using a nationally representative...

High availability in cloud computing services is essential for maintaining customer confidence and avoiding revenue losses due to SLA violation penalties. Since the software and hardware components of cloud infrastructures may have limited reliability, fault tolerance mechanisms are means of achieving the necessary dependability requirements. This paper investigates the benefits of a warm-stand...

is fast becoming a basic feature of digital systems, not only for critical applications , but also for highly-available applications. To achieve the goals of high error coverage and low error latency, advanced hardware features for testing and monitoring must be included. One such hardware feature is built-in self-test (BIST), a technique widely applied in manufacturing testing. We present a pr...

The experimental multiprocessor system MEMSY2 will be described. This system was built to validate the concept of the MEMSY architecture a scalable multiprocessor architecture based on local shared-memory. Main application areas are scientific computations with a high demand for processing power and memory capacity. In designing the hardware architecture the extensive use of standard components...

This paper is the continuation of the research devoted to enhancing the adequacy of reliability model of Nuclear Power Plant (NPP) Instrumentation and Control (I&C) Systems considering software reliability. The reliability model of NPP I&C systems is a basement from which the availability, safety, risk, and other important characteristics of the system could be assessed. The availability functi...

Paper is devoted to a design FPGA problem regarding increase in trustworthiness of the results calculated in digital components of computer systems. The modern CAD solves this problem by implementation of significant hardware redundancy in fault tolerant decisions. The method for increase in trustworthiness of the results calculated on FPGA with the LUT-oriented architecture is offered. This me...