complies with the regulations of the University and meets the accepted standards with respect to originality and quality. In this thesis we propose a set of independent techniques in the overall concept of LC resonant clocking where each technique reduces power consumption and improve system performance. Low-power design is becoming a crucial design objective due to the growing demand on portab...

The fast growth of the power density in integrated circuits has made area and power dissipation as the vital design measures. In this paper, several different flip-flop topologies are analyzed and an area, power efficient flip-flop design is proposed. This design overcomes the power dissipation due to the large precharge node capacitance, with reduced number of transistors. The comparative powe...

Development of large computerized systems requires both combinational and sequential circuits. Registers and counters are two important examples of sequential circuits, which are widely used in practical applications like CPUs. The basic element of sequential logic is Flip-Flop, which stores an input value and returns two outputs (Q and Q ). This paper presents an innovative ternary D Flip-Flap...

Quantum-Dot Cellular Automata (QCA) is a transistor-less technology. In QCA, Columbic repulsion between electrons in the quantum dots makes data transfer possible. This paper presents design of flip flops using proposed Rotated-Normal Cells with Displacement (RND) inverter and cell interaction method. The SR latch, Flip Flop (FF), D FF, T FF are developed QCA. gives total average energy dissipa...

D flip flop is one of the fundamental building blocks in most digital designs. Many high speed digital circuits such as memory require high speed and low power consumption. In existing method, the charge keeper is used to provide strong 0 and strong 1 since it uses pass transistor for signal feed through technique. A new D Flip Flop is proposed with signal feed through technique using transmiss...

Digital circuit design is streamlined process used to improve the performance of a circuit for a particular application. Fast speed, minimum power dissipation and less area are the desirable characteristics of a digital circuit, in general. To meet a particular standard of speed, a compromise in power dissipation and speed is required. Timing elements such as Flip-flop are used as clock generat...

We present a framework that considers global routing, repeater insertion, and flip-flop relocation for early interconnect planning. We formulate the interconnect retiming and flip-flop placement problem as a local area constrained retiming problem and solve it as a series of weighted minimum area retiming problems. Our method for early interconnect planning can reduce and even avoid design iter...

Today to compete the race of improvements and advancements of technological mysteries are lasting upon innovative ideas and noble thoughts. The consequences of using normal Master-Slave Flip-flops in ultra high speed circuits are increase in cycle time, blurredness in clock edge / skew, higher crosstalk / substrate coupling/power consumption/ expensive packaging including cooling systems and li...

Implementation of switching activity in the all-optical domain is an essential aspect modern high-speed and secured communication technology. Micro-ring Resonator (MRR) based can be used to implement active low tri-state buffer logic clocked D flip-flop. The paper describes micro-ring resonator structures. further effective 4-bit memory register using appropriate arrangement buffers flip-flops ...