This paper provides the mathematical derivation of the equivalent logic gates for spike code processing in neurons. It derives the computational equivalence between the binary code and spike code to illustrate the correspondence between binary and spike code logic operations theoretically. It identifies the similarities and differences between biological neural processing and binary logic gate ...

Adiabatic logic is an implementation of reversible logic in CMOS where the current flow through the circuit is The dual rail toffoli gate is designed using transmission gate. minimum sized XOR gate is implemented at 0.12ìm. solving the problems. Transmission Gate (TG) uses to realize complex logic functions by using a small number It is implemented in Standard CMOS logic (3). Proposed CLA imple...

An analytical model for 1/f gate noise is developed and applied to the simulation and the characterization of ultra-thin MOSFETs. The proposed model is based on oxide trapping mechanisms and uses the concept of equivalent flat band voltage fluctuations. The developed model reproduces experimental behaviors. The power spectral density of flat band voltage fluctuation extracted from gate current ...

In this paper, we have presented a heterojunction gate all around nanowiretunneling field effect transistor (GAA NW TFET) and have explained its characteristicsin details. The proposed device has been structured using Germanium for source regionand Silicon for channel and drain regions. Kane's band-to-band tunneling model hasbeen used to account for the amount of band-to...

One method of solving the governing equations of fluid flow about complex geometries is to use multi-zonal method. In this method the overall domain is divided into small number of simpler domains. In each zone, the flow field is solved independently of other zones. The boundary conditions for connecting zones are enforced to convey the necessary linkage. This multi – zonal procedure has been a...

We propose and analyze heralded quantum gates between qubits in optical cavities. They employ an auxiliary qubit to report if a successful gate occurred. In this manner, the errors, which would have corrupted a deterministic gate, are converted into a nonunity probability of success: once successful, the gate has a much higher fidelity than a similar deterministic gate. Specifically, we describ...

In this paper, we extract the mobility of ultra-thin, body buried oxide and fully depleted silicon-on-insulator MOSFET, for different front and back-gate configurations. The mobility values are found by using the Capacitance Gate Voltage and Current Gate Voltage characteristics. In addition, the maximum electron mobility is calculated for both configurations: SiON/Si (front-gate) and SiO2/Si (b...

A large amount of research is currently going on in the field of reversible logic, which have low heat dissipation, low power consumption, which is the main factor to apply reversible in digital VLSI circuit design. This paper introduces reversible gate named as 'Inventive0 gate'. The novel gate is synthesis the efficient adder modules with minimum garbage output and gate count. The I...

This study addresses the energetic coupling between the activation and slow inactivation gates of Shaker potassium channels. To track the status of the activation gate in inactivated channels that are nonconducting, we used two functional assays: the accessibility of a cysteine residue engineered into the protein lining the pore cavity (V474C) and the liberation by depolarization of a Cs(+) ion...

For the 45nm technology node, high-k+metal gate transistors have been introduced for the first time in a high-volume manufacturing process [1]. The introduction of a high-k gate dielectric enabled a 0.7x reduction in Tox while reducing gate leakage 1000x for the PMOS and 25x for the NMOS transistors. Dual-band edge workfunction metal gates were introduced, eliminating polysilicon gate depletion...