Current legislation in European countries, as well as in other parts of the world, is putting stricter limits on pollutant emissions from road vehicles. This issue, in conjunction with the increase awareness of consumer for the environmental problems, will require the development of new clean propulsion systems in disruption with the current mobility solutions based on internal combustion engin...

This work was supported by the U.S. DOE Contract No DE-AC05-84-ER40150 Abstract Field-Programmable Gate Arrays (FPGAs) have provided Thomas Jefferson National Accelerator Facility (Jefferson Lab) with versatile VME-based data acquisition and control interfaces with minimal development times. FPGAs have been used to interface with VME controllers using standard A16 and A24 address modes. VME vec...

This paper presents the design and FPGA implementation of a 32bit configurable micro controller. The micro controller contains a 32-bit processor based on RISC-V Instruction Set Architecture, Cache memories, interrupt support, multiplexed buses and a Debug Unit. The processor support all integer arithmetic. Cache memories have various sizes upto 16kB. Prioritized stacked interrupt control is pr...

The flying shear machine is an important control equipment on the production line, its performance will directly affect the productivity, the quality and the qualified rate of the products. In this paper, the control problem of flying shear machine is taken as the research subject, it discusses the structure of servo controller of flying shear machine, puts forward the core control scheme based...

The current work is aimed to fabricate a pulse generator to meet the requirements of control and process signals to be applied on to several basic constituting functional units of a radar system. The functional units of Radar system includes Exciter, Receiver, Radar Controller, TCSG and Duplexer Antenna.The synchronized pulses generated are operate on functional units is accomplished by generat...

This paper presents a self-correcting control unit design using Hamming codes for finite state machine (FSM) state encoding. The adopted technique can correct single-bit errors and detect two-bit errors in the FSM register within the same clock cycle. The main contribution is the development of a parameterizable VHDL package and the respective error-correcting modules, which can easily be added...

In this paper, we describe an emulator environment based on an FPGA prototyping board. This emulator environment is for functional verification of a multi-media processor we are currently developing and for software development and debugging of its application programs. For these purposes, the emulator environment includes a debugging network and provides virtual wires and some utilities, board...

Control Circuits can be described using a top-down approach with the aid of Hierarchical Graph-Schemes (HGSs). The implementation of HGSs in a finegrain FPGA has been done using a Hierarchical Finite State Machine structure where each sub-algorithm implementation is independent from the others. Static and dynamically reconfigurable implementations using the XC6200 FPGA have been obtained by app...

This paper describes the implementation of fuzzy control algorithm (state controller with adjustable gains by fuzzy sets) in DC-DC Buck converter. All tasks are implemented by FPGA. Fuzzy sets are tuned by genetic algorithm of-line by using Fuzzy-logic and genetic toolbox in MATLAB. Fuzzyfication and defuzzyfication algorithms are implemented in real time in Field Programmable Gate Array (FPGA)...

Abstract A technique for highly reliable digital design for two FPGAs under a processor control is presented. Two FPGAs are used in a duplex configuration system design, but better dependability parameters are obtained by the combination of totally self-checking blocks based on a parity predictor. Each FPGA can be reconfigured when a SEU fault is detected. This reconfiguration is controlled by ...