Articles you may be interested in Selective chemical vapor sensing with few-layer MoS2 thin-film transistors: Comparison with graphene devices Appl. Growth-substrate induced performance degradation in chemically synthesized monolayer MoS2 field effect transistors Appl. Fabrication of stretchable MoS2 thin-film transistors using elastic ion-gel gate dielectrics Appl. High-performance organic thi...

Abstract The idea of resistive switching devices is originally based on the fact that application electric fields changes atomic structure locally and thus also electronic material. This leads globally to a sustained change in resistance material layer, which generally referred as switching. In devices, these reconfigurations are reversible allow state be maintained for long time, why memristiv...

Scaled MOS devices with gate oxides as thin as 1.5 nm are affected by direct-tunneling gate leakage. We demonstrate the sensitivity of the direct-tunneling gate current to variationsof both process parameters and parameters in the model of direct tunneling [3].The zero of the gate current is a probe for the form of the oxide near the drain-side corner of the poly gate. We argue that it can also...

This paper presents a new technique to implement exclusive-OR (XOR) gate by using MOS current mode logic (MCML) low-power tri-state buffer concept. The design of the proposed MCML XOR gate is carried out through analytical modeling of its static parameters. The proposed MCML XOR gate is analyzed and the performance is compared with the traditional MCML XOR gate. The theoretical propositions are...

This paper presents a physical explanation of MOSFET intrinsic gate to drain capacitance (CGD) going negative due to Drain Induced Barrier Lowering (DIBL) effect. For the sub-90nm MOS devices, DIBL effect may be dominant enough to guide CGD to negative if de-embedded from parallel extrinsic overlap, outer and inner fringing capacitances. The possibility of this phenomenon is evident from the re...

The transient process of the programming and erasing is very important for a nanocrystalfloating-gate flash memory. In this work, a computer simulation was carried out to investigate the charging, retention and erasing processes of our proposed Ge/Si hetero-nanocrystal floating gate flash memory. The transient gate current, the transient drain current and the average charge in one dot were simu...

Now a day’s reversible logic is an attractive research area due to its low power consumption in the area of VLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature of retrieving input logic from an output logic because of bijective mapping between input and output. In this manuscript, we design 4:2 and 5:2 reversible compressor circuits using a new ...

A model for MOS capacitors in accumulation is presented, which is able to predict the nonlinear distortion accurately. The key idea of this work is to include the polysilicon gate depletion effect in that model. Several test structures based on MOS capacitors in accumulation have been implemented with the object of validating the model and to explore the potential applications to high performan...