Using a two-end bonded ZnO piezoelectric-fine-wire (PFW) (nanowire, microwire) on a flexible polymer substrate, the strain-induced change in I-V transport characteristic from symmetric to diode-type has been observed. This phenomenon is attributed to the asymmetric change in Schottky-barrier heights at both source and drain electrodes as caused by the strain-induced piezoelectric potential-drop...

We studied the variation of photoresponsivity in multi-layer MoS2 phototransistors as the applied bias changes. The photoresponse gain is attained when the photogenerated holes trapped in the MoS2 attract electrons from the source. Thus, the photoresponsivity can be controlled by the gate or drain bias. When the gate bias is below the threshold voltage, a small amount of electrons are diffused ...

In this paper, we propose a new heterostructure dual material gate junctionless field-effect transistor (H-DMG-JLFET), with negative differential resistance (NDR) characteristic. The drain and channel material are silicon and source material is germanium. The gate electrode near the source is larger. A dual gate material technique is used to achieve upward band bending in order to access n-i-p-...

AlGaN/GaN high electron mobility transistors (HEMTs) with Si and Al2O3 substrates reveals anomalies on Ids–Vds–T and Igs–Vgs–T characteristics (degradation in drain current, kink effect, barrier height fluctuations, etc.). Stress and random telegraph signal (RTS) measurements prove the presence of trap centers responsible for drain current degradation. An explanation of the trapping mechanism r...

Submicrometer‐thick AlGaN/GaN high‐electron‐mobility transistor (HEMT) epilayers grown on silicon substrate with a state‐of‐the art vertical buffer breakdown field as high 6 MV cm −1 enabling voltage of 250 V for short gate‐to‐drain distances despite such thin structure are reported. HEMTs gate length 100 nm exhibit good DC characteristics low drain‐induced barrier, going mV DS 30 V. Breakdown ...

We present a formalism to treat quantum electronic transport at the nanometer scale based on empirical pseudopotentials. This formalism offers explicit atomistic wavefunctions and an accurate band structure, enabling a detailed study of the characteristics of devices with a nanometer-scale channel and body. Assuming externally applied potentials that change slowly along the electrontransport di...

The exponential rise in the density of silicon CMOS transistors has now reached a limit and threatening to end the microelectronics revolution. To tackle this difficulty, group III–V compound semiconductors due to their outstanding electron transport properties and high mobility are very actively being researched as channel materials for future highly scaled CMOS devices. In this paper, we have...

We propose an extremely energy-ecient mixed-signal approach for performing vector-by-matrix multiplication in a time domain. In such implementation, multi-bit values of the input and output vector elements are represented with time-encoded digital signals, while multi-bit matrix weights are realized with current sources, e.g. transistors biased in subthreshold regime. With our approach, multip...

In this study, novel p-type scallop-shaped fin field-effect transistors (S-FinFETs) are fabricated using an all-last high-k/metal gate (HKMG) process on bulk-silicon (Si) substrates for the first time. In combination with the structure advantage of conventional Si nanowires, the proposed S-FinFETs provide better electrostatic integrity in the channels than normal bulk-Si FinFETs or tri-gate dev...

We investigate the density-gradient (DG) transport model for efficient multi-dimensional simulation of quantum confinement effects in advanced MOS devices. The formulation of the DG model is described as a quantum correction to the classical drift-diffusion model. Quantum confinement effects are shown to be significant in sub-100nm MOSFETs. In thin-oxide MOS capacitors, quantum effects may redu...