Ordered dither is considered to be a simple and effective method among all halftoning techniques. In this paper, compaction of ordered dithered images using arithmetic coding is studied. A preprocessor referred to as pixel interleaving (i.e., grouping pixels with similar dithering thresholds) is employed in such a way that dithered images can be efficiently coded with the JBIG1 code and high co...

Floating Point operations is widely used in many areas, especially in signal processing. The greater dynamic range and lack of need to scale the numbers makes development of algorithms much easier. However, implementing arithmetic operations for floating point numbers in hardware is very difficult. The IEEE floating point standard defines both single precision (32-bit) and double precision (64-...

Abstract. A KPU is a replacement for a standard RISC processor that natively runs encrypted machine code on encrypted data in registers and memory – a ‘general-purpose crypto-processor’, in other words. It works because the processor’s arithmetic is customised to make the chosen encryption into a mathematical homomorphism, resulting in what is called a ‘fully-homomorphic encryption’ design. Thi...

This paper benchmarks a midrange MCU from Microchip (dsPIC33FJ family) used as a controller for a magnetic levitation plant. Basic control algorithms (slightly modified PID and State Space) are tested to present a rough idea of how long it takes to compute one iteration of the control algorithm loop. Beside this, the significance of various optimisation parameters for the code generation proces...

Proof Carrying Code (PCC) is a technique to exclude safety errors in low level code. Instead of runtime tests, it statically checks a proof of safety (a certificate) attached to the code. To guarantee that PCC only accepts safe code, we formalise and verify it in Isabelle/HOL, an interactive theorem prover for higher order logic. In an abstract framework we identify key components and their int...

The TaskGraph Library is a C++ library for dynamic code generation, which combines specialisation with dependence analysis and loop restructuring. A TaskGraph represents a fragment of code which is constructed and manipulated at run-time, then compiled, dynamically linked and executed. TaskGraphs are initialised using macros and overloading, which forms a simplified, C-like sub-language with fi...

Numerical software, common in scientific computing or embedded systems, inevitably uses a finiteprecision approximation of the real arithmetic in which most algorithms are designed. In many applications, the roundoff errors introduced by finite-precision arithmetic are not the only source of inaccuracy, and measurement and other input errors further increase the uncertainty of the computed resu...

Motivated by recent results in Joint Source/Channel coding and decoding, we consider the decoding problem of Arithmetic Codes (AC). In fact, in this article we provide different approaches which allow one to unify the arithmetic decoding and error correction tasks. A novel length-constrained arithmetic decoding algorithm based on Maximum A Posteriori sequence estimation is proposed. The latter ...

Verification of machine code can easily deteriorate into an endless clutter of low-level details. This paper presents a case study which shows that machine-code verification does not necessitate ghastly lowlevel proofs. The case study we describe is the construction of an x86-64 implementation of arbitrary-precision integer arithmetic. Compared with closely related work, our proofs are shorter ...

In this paper we show the possibility of using FAUST (a programming language for function based block oriented programming) to create a fast audio processor in a single chip FPGA environment. The produced VHDL code is embedded in the on-chip processor system and utilizes the FPGA fabric for parallel processing. For the purpose of implementing and testing the code a complete System-On-Chip frame...