We present an analog circuit implementation of the novel partial control method, that is able to sustain chaotic transient dynamics. The electronic circuit simulates the dynamics of the onedimensional slope-three tent map, for which the trajectories diverge to infinity for nearly all the initial conditions after behaving chaotically for a while. This is due to the existence of a nonattractive c...

A method of testing for parametric faults of analog circuits based on a polynomial representaion of fault-free function of the circuit is presented. The response of the circuit under test (CUT) is estimated as a polynomial in the applied input voltage at relevant frequencies apart from DC. Classification of CUT is based on a comparison of the estimated polynomial coefficients with those of the ...

Recently, Andrews and Berkovich introduced a trinomial version of Bailey’s lemma. In this note we show that each ordinary Bailey pair gives rise to a trinomial Bailey pair. This largely widens the applicability of the trinomial Bailey lemma and proves some of the identities proposed by Andrews and Berkovich. The trinomial Bailey lemma In a recent paper, Andrews and Berkovich (AB) proposed a tri...

The use of charge-coupled devic[; structures for analog signal processing is described. By operating in the charge domain, such structures offer the advantages of low··power, compact-layout, and high-speed operation. The circuits are digitally programmable and unlike continuous-time analog circuits, their operation can be fully synchronous. The application or the charge-domain circuits to on-ch...

Analog circuits and systems are by nature sensitive to parameter deviations. These variations cause a system behavior differing from the nominal constructed property. In this paper, we discuss and demonstrate the applicability of Affine Arithmetic for analyzing the impact of parameter deviations and uncertainties on system parameters. Affine Arithmetic allows us to model deviations and uncertai...

An analog circuit synthesis method based on evolutionary circuit techniques is proposed where the chromosome in the genetic algorithm is coded through the use of adjacency matrices. The method assumes that the circuit is described at the behavioral level in order to reduce the simulation time. It is shown that adjacency matrices coding of the chromosome reduces considerably the number of anomal...

Despite the significance of matched devices in analog circuit design, mismatch modeling for design application has been lacking. This paper addresses misconceptions about MOSFET mismatch for analog design. t mismatch does not follow a simplistic 1 ( area) law, especially for wide/short and narrow/long devices, which are common geometries in analog circuits. Further, t and gain factor are not ap...

This paper presents a method towards hierarchical symbolic analysis of linear analog circuits using twoport networks. The important difference to the ordinary flat symbolic analysis is, that we treat the transistor pairs as blocks and then derive the transfer function with network analyzer without to setup and solve a complicated DAE system for a whole analog circuit. The hierarchical idea can ...

In this paper, we present a technique for characterizing CMOS analog circuits based on directed intervals. The technique consists of an analog performance es-timator and a characterization table generator. This characterization information may be eeciently used by the constraint transformation step in an analog synthesis system. We present a genetic algorithm based constraint transformation met...

There are very few reports in the past on applications of Evolutionary Strategy (ES) towards the synthesis of analogue circuits. Moreover, even fewer reports are on the synthesis of computational circuits. Last fact is mainly due to the difficulty in designing of the complex nonlinear functions that these circuits perform. In this paper, the evolving power of the ES is challenged to design four...