This paper presents an Inductive Power Transfer (IPT) system design using a Class E converter circuit. The Class E converter is used to drive a nonlinear load and theoretically it offers 100% efficiency. To be specifically, the performance of IPT system at 1MHz operating frequency and 9V DC supply voltage is analyzed. Voltage doubler rectifier and Darlington circuit are proposed in this paper t...

This article is present high-precision multi-wave rectifier circuit operating in low voltage + 1.5 Volt current modes by CMOS technology 0.5 μm, receive input and give output in current mode, respond at high frequency period. The structure compound with high-speed current comparator circuit, current mirror circuit, and CMOS inverter circuit. PSpice program used for confirmation the performance ...

For high-voltage applications, the series operation of devices is necessary to handle high voltage with limited voltage rating devices. In the case of self turn-off devices, however, the series operation of devices is very difficult. The main problem associated with series-connected devices is how to guarantee the voltage balance among the devices both at the static and the dynamic transient st...

In this paper, a new D-latch topology has been implemented in MOS Current Mode Logic (MCML) that works on lower supply voltage than the D-latch topology already implemented in MCML. The already implemented D-latch topology is called Traditional DLatch Topology and the new D-latch topology that works on lower voltage is called low-voltage D-Latch Topology. Power consumed by MCML circuit is direc...

Abstract: A fully integrated cross-coupled charge pump circuit with four-clock signals and a new method of body bias have been proposed. The new clock scheme eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the supply voltage. We have also solved the gate-oxide overstres...

With the consideration of low standby leakage in nanoscale CMOS processes, a new 2×VDD-tolerant ESD clamp circuit was presented in this paper. The new ESD clamp circuit had a high-voltage-tolerant ESD detection circuit to improve the turn-on efficiency of the silicon-controlled-rectifier-based (SCRbased) ESD device. This design had been successfully verified in a 65-nm CMOS process. The leakage...

– Four different dynamic circuit techniques are proposed in this paper for lowering the active mode power consumption, increasing the speed, enhancing the noise immunity, and reducing the subthreshold leakage energy of domino logic circuits. A variable threshold voltage keeper circuit technique is proposed for simultaneous power reduction and speed enhancement of domino logic circuits. The thre...

This paper presents a simple Pico Watt reference circuit with the output voltage of 263.1mV using sub-threshold operation of MOSFETs at supply voltage of 0.7V. Proposed circuit consumes merely 400 pW of power at room temperature and it is designed using standard TSMC 0.18μm technology. Reference voltage is provided by subtracting the 0◦C threshold voltage of MOSFETs. The simulation results show...

Metal oxide surge arresters (ZNO) are used widely in power system to protect equipments from over voltages. Non uniform potential distribution leads to the depressed service life and low safe reliability, so grading ring is applied on HV surge arrester order to uniform the electric field distribution. One of the problems of arresters is leakage current in power frequency that different paramet...