In this paper, targeted fooling of high performance image classifiers is achieved by developing two novel attack methods. The first method generates universal perturbations for target classes and the second generates image specific perturbations. Extensive experiments are conducted on MNIST and CIFAR10 datasets to provide insights about the proposed algorithms and show their effectiveness.

This research had two central goals: to examine the role of personality in (a) performing actions that anger spouses, and (b) eliciting angerprovoking actions from spouses. Personality data on a sample of married persons {N = 214) were obtained from three sources—self-report, spouseobserver report, and independent interviewers' reports. In a separate session, subjects recorded which of 147 upse...

On-board Error Detection and Correction (EDAC) devices aim to secure data transmitted between the central processing unit (CPU) of a satellite onboard computer and its local memory. This paper presents a comparison of the performance of four low complexity EDAC techniques for application in Random Access Memories (RAMs) on-board small satellites. The performance of a newly proposed EDAC archite...

One area that has been extensively researched within the biological/evolutionary approach is that of human mating or sexual preferences. Buss (1994) studied attitudes and behaviours of men and women across 37 different cultures towards sexual behaviour. Buss found, for example, that compared to women, men are more interested in casual sex, prefer a younger partner and get more jealous over sexu...

The current research was designed to examine objective and contextual factors related to the appraisal of potentially sexually harassing situations. Working female participants (n = 208) from a mid-sized southwestern university completed a workplace experiences survey in small groups. The majority of participants were Hispanic/ Latina (77.9%). We predicted that characteristics of personal haras...

A dedicated high-speed 18 Kbit static memory featuring synchronous mode, parity and dual port access has been designed and fabricated in a quarter micron 3 metals commercial CMOS technology. This SRAM has been designed to be a test vehicle to measure Single Event Upset (SEU) effects on a real circuit. The measurements have been performed at the cyclotron of Louvain-la-Neuve, Belgium, with a pro...

When exposed to an harsh environment in space, high atmosphere or even on earth, Integrated Circuits undergo soft errors. Among these events the most worrying is an electrical upset, so called Single Event Upset (SEU) evidenced in latches. We present here the circuit architecture of a new SEU hardened latch. The hardening is based on an integrated redundancy of the information and a high impeda...

The XQR18V04 was evaluated for single event upset rates using proton and heavy ions. The PROM was demonstrated to be immune to latch-up, as well as to static upset in the flash memory cells, to an LET > 125 MeV/mg/cmz (effective). The PROM was also tested in a dynamic mode, which revealed three distinct error modes: Read Bit Errors, Address Errors, and a Single Event Functional Interrupt (SEW w...