Most formal models that are used in the industry are close to the level of code, and often ready to be used for code generation. Formal models can also be analysed and verified in order to detect any faults. As the first formal models are often such code-level models, their analysis not only reveals a lot of detailed design faults, but also the more relevant conceptual faults in the design and ...

In this paper, we propose a new concept of testing only functionally testable transition faults in Broadside Transition testing via a novel constrained ATPG. For each functionally untestable transition fault , a set of illegal (unreachable) states that enable detection of is first computed. This set of undesirable illegal states is efficiently represented as a Boolean formula. Our constrained A...

Energy Consumption Ratio (ECR) test, a current-based test, has shown its ability to reduce the impact of process variations and detect hard-to-detect faults. The effectiveness of ECR tests may be degraded by a large number of normal transitions in a circuit, which may bury the fault impact on the overall current. For deterministic ECRs, the fault-oriented ECR tests are generated with an algorit...

The delay fault testing in logic circuits is studied. It is shown that by detecting delayed time response in a transistor circuit, two types of faults are detected: 1) faults which cause delayed transitions at the output node due to some open defects and 2) faults which cause an intermediate voltage level at the output node. A test circuit is presented which enables the concurrent detection of ...