We derive decentralized and scalable stability conditions for a fluid approximation of a class of Internet-like communications networks operating a modified form of TCP-like congestion control. The network consists of an arbitrary interconnection of sources and links with heterogeneous propagation delays. The model here allows for arbitrary concave utility functions and the presence of dynamics...

This paper proposes a model to calculate statistical gate-delay variation caused by intra-chip and inter-chip variabilities. The variation of each gate delay directly influences the circuitdelay variation, so it is important to characterize each gate-delay variation accurately. Every transistor in a gate affects transient characteristics of the gate, so it is indispensable to consider an intrag...

Introduction Starting with the very early experiments relating to laser fusion, observations have shown acharacteristic spectral emission near the 312 harmonic of the irradiating laser ~ a v e 1 e n ~ t h . l For simplicity we will name this emission "312 self-emission" to distinguish it from similar spectral features that may be induced by a separate probe beam. This spectral signature was imm...

Taiwan’s Digital School (DS) was established to suport online K-12 Teacher Professional Development. At the core of the online TPD center is platform-independent, webbased environment designed to meet the needs of a large and diverse community of education professionals. DS provides a powerful set of synchronous and asynchronous communication systems, and support tools. DS offers teaching commu...

This chapter discusses properties of feedback control systems containing loop delays (dead-time systems) and approaches to controller design for such systems. Consider the feedback system depicted in Fig. 1, where P is a plant, C is a controller, r is a reference signal, d is a disturbance, u is a control signal, and y is an output (measurement) signal. It is assumed throughout that both the me...

Process variation has more significant impact on circuit performance as technology develops to nano scale. It is therefore necessary to evaluate chip performance using statistical timing analysis rather than deterministic static timing analysis. This paper first evaluates the impact of single extrinsic fluctuation on circuit performance based on the rigorously derived propagation delay model. T...

A new design method for high performance level shifting circuits is presented in this paper. We propose two level shifting circuits that reduce problems that exist in complementary level shifting circuits described previously. Using HSPICE parameters of a 0.35um CMOS process, simulations have been performed under various capacitive loading and operating conditions. The simulation results show t...

Herein, the problem of estimating propagation delays of the transmitted signals in a direct-sequence code-division multiple access (DS-CDMA) system operating over fading channels is considered. Even though this study is limited to the case when the propagation delays are xed during the observation interval , the channel gain and phase are allowed to vary in time. Special attention is given to t...

of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the buffer propagation delay and the optimum taper factor is discussed and a mathematical relationship for total p...

Real-world changes are generally discovered delayed by computer systems. The typical update patterns for traditional data warehouses on an overnight or even weekly basis enlarge this propagation delay until the information is available to knowledge workers. The main contribution of the paper is the identification of two different temporal characterizations of the information appearing in a data...