This paper reports on the investigation of charge-transfer noise and lag in CMOS image sensors. Noise and lag are analyzed for buried-photodiode CMOS active-pixel-sensor (APS) devices using a simple Monte-Carlo technique. Since the main mechanism of charge-transfer noise involves carrier emission over a barrier, the results are applicable to the soft reset of photodiode-type CMOS APS devices, a...

A complete first and second order statistical characterization of noise in SENSE reconstructed data is proposed. SENSE acquisitions have usually been modeled as Rician distributed, since the data reconstruction takes place into the spatial domain, where Gaussian noise is assumed. However, this model just holds for the first order statistics and obviates other effects induced by coils correlatio...

Abstract Prolonged, repeated or very intense noise exposure can damage human health. To reduce any dangerous effects of on health, policies and restrictions are enshrined in national law legislative regulations. In the Czech Republic, this issue is subject to Ministry Health. other states it be Health more often Environment. The protection health against vibration Act No. 258/2000 Coll., Protec...

A parallel algorithm for reducing impulse noise from color images is proposed. The algorithm is based on a fuzzy metric and is performed in two steps followed by noise filtering using the vector median filter. An implementation of the algorithm on multi-core interface using the Open MultiProcessing (OpenMP) is presented. A performance analysis with large images is conducted. Performance is eval...

We demonstrate that shot noise in Fe/MgO/Fe/MgO/Fe double-barrier magnetic tunnel junctions is determined by the relative magnetic configuration of the junction and also by the asymmetry of the barriers. The proposed theoretical model, based on sequential tunneling through the system and including spin relaxation, successfully accounts for the experimental observations for bias voltages below 0...

To simplify program development for the Singlechip Cloud Computer (SCC) it is desirable to have highlevel, shared memory-based parallel programming abstractions (e.g., OpenMP-like programming model). Central to any similar programming model are barrier synchronization primitives, to coordinate the work of parallel threads. To allow high-level barrier constructs to deliver good performance, we n...