Integral histogram image can gather speed the computing process of feature algorithm in computer vision, butex habits high working out complexity and incompetent memory access. In this paper, we propose a configurable parallel architecture to improve the computing efficiency of integral histogram. The design in the several integral objects is well supported for an integral histogram image such ...

Modern switches and routers often use dynamic RAM (DRAM) in order to provide large buffer storage space. However, the effective bandwidth of DRAM is frequently a limiting factor in the design of high-speed switches and routers. The focus of this paper is to introduce a packet-buffering architecture called the parallel packet buffering (PPB), which increases the effective memory bandwidth signif...

The purpose of this paper is to show that multi-threading techniques can be applied to a vector processor to greatly increase processor throughput and maximize resource utilization. Using a trace driven approach , we simulate a selection of the Perfect Club and Specfp92 programs and compare their execution time on a conventional vector architecture with a single memory port and on a multithread...

Expert programming involves the manipulation of large amounts of memory, including external memory represented on a display, semantic memory for expert knowledge, and episodic memory about what has transpired during a particular programming session. We present a computational cognitive model that emulates several minutes of expert, naturalistic programming behavior. The model has three high-lev...

Histogram computation is the crucial task used in processing so many image guided applications like pattern recognition, segmentation etc. Image registration one of fundamental techniques for pre-processing images. Registration process overlaying multiple images to geometrically align them. In medical processing, improper can have negative impact on analysis which influences final diagnosis. Th...

Reinforcement learning (RL) is a foundation of in biological systems and provides framework to address numerous challenges with real-world artificial intelligence applications. Efficient implementations RL techniques could allow for agents deployed edge-use cases gain novel abilities, such as improved navigation, understanding complex situations critical decision making. Towards this goal, we d...

By the end of the decade, computing designs will shift from a processor-centric architecture to a memorycentric architecture. At rack scale, we can expect a large pool of non-volatile memory (NVM) that will be accessed by heterogeneous and decentralized compute resources [3, 17]. Such memory-centric architectures will present challenges that today’s processor-centric OSes may not be able to add...