In this paper we propose a modified probabilistic estimation bias (PEB) formula for fixed-width radix-4 Booth multiplier. The modified PEB formula estimates the same compensation value as the existing PEB formula without rounding operation. A bias circuit based on modified PEB formula generates one less carry-bit and involves less logic resources than the existing PEB circuit. The partial produ...

In this paper the testability of modified-Booth array multipliers for standard cells based design environments is examined for first time. In such cases the structure of the cells may be unknown, thus Cell Fault Model (CFM) is adopted. Two C-testable designs are proposed. A design for an Nx x Ny bits modified-Booth multiplier, which uses ripple carry addition at the last stage of the multiplica...

Seshiru Nakazawa, Toshiki Yajima, Yoichi Ohtaki, Tomokazu Ito, Takayuki Kosaka, Ken Shirabe

www.ijcrd.com Page 1 AbstractMultiplication is a fundamental arithmetic operation used in multimedia and DSP applications like convolution,filtering and compression. Since multipliers have a significant impact on the performance of the entire system, many high performance algorithms and architecture have been proposed to accelerate multiplication. Fixed-width booth multipliers provide high perf...