A new thiosemicarbzone compound was prepared by the reaction of acenaphthenequinone and thiosemicarbazide (1:1 molar ratio) in absolute methanol at 70°C. The crystal structure of this compound, acenaphthenequinone thiosemicarbazone mono methanol, was determined by X-ray crystallography. The unit cell parameters are as follows: a = 7.0384(14) Ǻ, b = 14.202(3) Ǻ, c = 14.270(3) Ǻ, β = 104.26(3)°. ...

Cellular manufacturing (CM) is one of the most important subfields in the design of manufacturing systems and as a recently emerged field of study and practice, virtual cellular manufacturing (VCM) inherits the importance from CM. One type of VCM problems is VCM with alternative processing routes from which the route for processing each part should be selected. In this research, a bi-objective ...

In this paper, systematic mismatch due to parameter gradients is modeled and analyzed. A new layout strategy with flexible cell placement is proposed. Theoretical analysis shows its property of canceling the mismatch between two devices due to up to n order gradient effects by using 2 unit cells for each device. Simulation results show that the proposed technique gives better matching character...

This paper studies the device variability influence on 6T-SRAM cells in a function of the regularity level of their layout. Systematic and random variations have been analyzed when these memory circuits are implemented on a 45 nm technology node. The NBTI aging relevance on these cells has been also studied for two layout topologies and SNM has been seen as the parameter that suffers the highes...

A set of CAD tools for the synthesis and layout generation of multiple-valued current-mode CMOS logic (CMCL) circuits is described. The synthesis method is based upon the cost-table method. The general circuit structure, the cost-table functions and the decomposition procedure used in the cost-table synthesis program are explained. The synthesis program is based upon a logically complete set of...

Integrated applications for solar energy production becomes increasingly important. The electrification of car bodies and building facades are only two prominent examples. In such shading a challenging problem, since the classic serial interconnection cells in terms power output is highly vulnerable to partial shading. this article, we investigate three most common module layouts market (conven...

The layout design to improve uniform ESD current distribution in multi-finger MOSFET devices for better ESD robustness is investigated in a 0.18-μm salicided CMOS process. The multi-finger MOSFET, without adding the pick-up guard ring inserted into its source region, or with the vertical direction of power line connection, can sustain a higher ESD level. The layout of I/O cell can be drawn more...

New technologies present a widely range of challenges in the design of standard-cell libraries, layout generation and validation of macro-blocks. Thus, the development of new tools being able to deal with these challenges is mandatory. This work presents a transistor placement technique using genetic algorithm associated to analytical programming. The genetic algorithm is used to reduce the sea...

We introduce a concept in VLSI layout which can nd applications in submicron design, quantum devices, and designing new ne-grain FPGAs. This concept is called Lattice Structure and it extends the concepts from [8] and [1,13,14,17,18]. In the regular arrangement of cells, every cell is connected to 4, 6 or 8 neighbors and to vertical, horizontal and diagonal buses. Methods for expanding arbitrar...