We give a quantum gate construction composed entirely from incidents of the CNOT gate that generalises the qubit SWAP gate to higher dimensions. This new construction is more regular than and is an improvement on the WilNOT quantum gate construction.

1) Introduction Recent systems are built of MOSFET transistors. Here, MO stands for metal oxide and FE for field effect. This means, that – in contrast to bipolar transistors – the gate is isolated by a metal oxide (today SiO2) and the channel is just controlled by the field through this oxide. Thus theoretically, the principal of MOSFET devices is that there is no current flowing through the g...

We address disturbs due to gate oxide and junction leakage currents in floating gate nonvolatile memories (NVM). The junction leakage is important, because the gate oxide current is proportional to junction current. We find the low gate leakage current to be caused by field ionization (FI) from traps within the gate oxides. Such low gate leakage currents can lead to sufficient charge accumulati...

A single-shot Toffoli, or controlled-controlled-not, gate is desirable for classical and quantum information processing. The Toffoli gate alone is universal for reversible computing and, accompanied by the Hadamard gate, forms a universal gate set for quantum computing. The Toffoli gate is also a key ingredient for (nontopological) quantum error correction. Currently Toffoli gates are achieved ...

In this paper, a novel gate technology with triple shaped gate structure has proposed and developed in order to suppress unwanted gate fringing capacitance. Because high gate stem height was difficult to fabricate by means of conventional direct electron beam (E-Beam) lithography method, additional PMGI sacrificial layer was utilized in this new scheme. Increasing gate stem height as an amount ...

Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such that the delay of a combinational circuit is minimized while the cost constraint is satisfied. It is one of the most studied problems in VLSI computer-aided design. Despite this, all of the existing techniques are heuri...

In this Letter, we report gate-tunable X-ray photoelectron emission from back-gated graphene transistors. The back-gated transistor geometry allows us to study photoemission from graphene layer and the dielectric substrate at various gate voltages. Application of gate voltage electrostatically dopes graphene and shifts the binding energy of photoelectrons in various ways depending on the origin...