This paper is has addressed the Single Flexible Link Robot. The dynamical model is derived using Euler-Lagrange equation and then a proper controller is designed to suppress a  vibration based-on Input-Shaping (IS) method. But, IS control method is an open loop strategy. Due to the weakness of open loop control systems, a closed loop IS control system is proposed. The achieved closed loop c...

We stabilized the repetition rate of an optical frequency comb using a self-referenced phase-locked loop. The phase-locked loop generated its error signal with a fiber-optic delay-line interferometer that had a path-length difference of 8 m. We used the stabilized repetition rate to generate a 10 GHz signal with a single-sideband phase noise that was limited by environmental noise to -120  dBc/...

in this paper a new method is introduced and investigated for removing the destabilizing effects of time-delay parameter in control loops. the concept of the method is taken from the knowledge concerning the dynamic behaviour of irrational transfer functions (ir-tf), which is discussed and investigated elswhere in frequency response domain and is explained briefly here. ir-tfs, which are well c...

The tracking performance of non-linear amplifier based conventional second order phase locked loop (PLL) and charge pump phase locked loop have been examined numerically by solving the system equations in the presence of lognormal type of fading signal. Some analytical results for non-linear amplifier based conventional phase locked loop and charge pump phase locked loop are also incorporated t...

Nowadays, RF communication standards for voice and data are widely being developed, particularly in the [1-4] GHz band (GSM, DCS, UMTS, Wi-Fi, Bluetooth, WiMax...). Strict requirements are linked with each application, and as a consequence, constraints are growing for communication terminals. Moreover, according to low-cost and low-power considerations, a RF transmitter should be able to deal w...

A multiplying delay-locked loop (MDLL) for highspeed on-chip clock generation that overcomes the drawbacks of phase-locked loops (PLLs) such as jitter accumulation, high sensitivity to supply, and substrate noise is described. The MDLL design removes such drawbacks while maintaining the advantages of a PLL for multirate frequency multiplication. This design also uses a supply regulator and filt...

Delay differential equation model of a NOLM-NALM mode-locked laser is developed that takes into account finite relaxation rate the gain medium and asymmetric beam splitting at entrance nonlinear mirror loop. Asymptotic linear stability analysis continuous wave solutions performed in limit large delay indicates class-B flip instability leading to period doubling cascade development square-wave p...

This paper presents a re-circulating delay-locked loop @LL) with various innovations to improve in-band phase noise suppression. The voltage-controlled oscillator @’CO) and bias circuitry incorporate circuit-level techniques that reduce l/f noise through switched biasing. The phase realignment theory presented in [I] is applied to optimize the VCO so as to maximize the phase noise suppression a...

This paper presents a new circuit topology of a phase-locked loop that can be used for synchronising a singlephase wind turbine generator (WTG) with the low voltage utility grid. The circuit is based on the time-delay digital tanlock loop (TDTL) architecture and was modelled and simulated using Simulink/MATLAB. The results presented demonstrate the ability of the circuit not only to synchronise...