This work proposes a novel linearized low noise amplifier (LNA) for X-band applications with flat power gain, performance and enhanced linearity. In this study, triple-cascode topology dual-resonant network is utilized modified post-distortion introduced to improve the The LNA utilizes subthreshold auxiliary NMOS transistor reduce nonlinearity consumption. addition, methodology proposed predict...

Just when it seemed like the market for short-range RF technologies had become synonymous with Bluetooth, Wi-Fi and other products reaching commodity status, there will soon be another signal to contend with: ZigBee. This pervasive wireless networking environment adds to the challenge that engineers designing these systems have to provide a receiver that delivers valid, uncorrupted data packets...

This proposed architecture is a single-end to dual-end CMOS RF front-end which is applied for LTE system. This work use Digital IF receiver architecture including current reuse source inductive degeneration LNA and folded-cascode mixer in accord with 3GPP LTE system standard. Since LTE is a communication protocol applied on handheld devices, the demands of circuit designs are based on low power...

Built-in self-test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to perform radio-frequency signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry, can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as in-phase and quadr...

A low-power wideband mixer is designed and implemented in 0.13 µm standard CMOS technology based on resistive feedback current-reuse (RFCR) configuration for the application of cognitive radio receiver. The proposed RFCR architecture incorporates an inductive peaking technique to compensate for gain roll-off at high frequency while enhancing the bandwidth. A complementary current-reuse techniqu...

This paper presents the design of a reconfigurable Low-Noise Amplifier (LNA) for the next generation of wireless hand-held devices. The circuit, based on a lumped-approach design and implemented in a 90nm standard RF CMOS technology, consists of a two-stage topology that combines inductive-source degeneration with MOS-varactor based tuning networks and programmable bias currents, in order to ad...

A 1.2-V fully integrated 0.35m inductively degenerated common source CMOS low-noise amplifier has been demonstrated at 2.4 GHz in this paper. A simple common source configuration can be operated at lower voltage and has lower output impedance when compared with a conventional high output impedance cascode LNA circuit topology. The input matching inductance, output matching inductance, and sourc...

A 2-GHz, Continuous-Time Bandpass ∆Σ Analogto-Digital Converter sampled with a 40-GHz clock was implemented in a 130-nm SiGe BiCMOS technology. It achieves an SNDR of 55 dB and 52 dB over 60 MHz and 120 MHz, respectively, and an SFDR of 61 dB with a single-ended IIP3 of +4 dBm. The center frequency is tunable from 1.8-2 GHz. It employs a Gm-LCVAR filter based on a MOS-HBT cascode transconductor...

This paper describes a CMOS analog baseband circuits for directconversion receiver of5GHz IEEE 802.11a. The analog baseband consists of I/Q signal paths which have channel selection filter, programmable gain amplifier (PGA). An active-RC channel selection filter for WLAN is described whose cut-off frequency is tunable from 6MHz to 20MHz. For high linearity, the PGA is constructed with op-amp an...

A full frequency band active RF tracking filter design for a digital TV tuner is implemented for the first time. By combined control of the Gm and C values in the biquad of the Gm-C filter, the proposed tracking bandpass filter satisfies full frequency band tuning while maintaining narrow bandwidth. The Gm cell of the tracking filter is based on a dynamic source degenerated differential pair wi...