This paper is focused on how to implement a nonlinear voltage divider used in the electrical power network disturbances measurement system preconditioning circuit. The voltages acquired from the electrical power network have amplitudes between 0.2 kV and 10 kV, values which are very high for an acquisition board. These amplitudes must be reduced to the values accepted by the acquisition boards:...

A novel planar dual-band microstrip power divider is proposed in this paper. The circuit is composed of two sections of transmission line, short-circuited stub line and planar resistor, which can provide high isolation and good amplitude balance simultaneously at two frequencies. The closed-form equations are derived, and the design procedures of dual-band power divider are given. To certify th...

A compact ultra-wideband (UWB) power divider with favorable selectivity is proposed. A transversal filtering transformer consisting of two different centrally loaded resonators with common feeding lines is introduced at input port to obtain good in-band response and high out-of-band rejection. Simple and rapid design procedure is adopted to find the key parameters. A prototype power divider is ...

This paper presents a novel quad-band power divider with equal power division ratio. The proposed power divider is realized using two cascaded sections of dual-band transformers based on coupled microstrip lines. Limitations of using dual-band quarterwavelength transformers based on coupled lines are studied through parametric analysis to obtain useful design guidelines related to available fab...

A novel type of power divider, featuring arbitrary power ratio and arbitrary ripple level, is proposed. This divider consists of a two-port filtering structure connected to a circulator and is straightforwardly designed using microwave filter synthesis techniques. An example is provided, with low-pass domain synthesis and experimental divider demonstration at the Xband, after low-pass to bandpa...

A high-speed low power scalable programmable dual modulus digital CMOS frequency divider architecture is proposed. The unique frequency divider architecture includes a high speed parallel counter with State Excitation Module, a switchover trigger circuit, a modulus switchover circuit and a reloader circuit. The mode switchover circuit has two sets of external programmable inputs for two alterna...

This paper presents the design and simulated performance of an ultra-low-power 4/5 frequency divider based on a CMOS ring oscillator. The divider operates over a 189% locking range (29MHz – 1GHz) for both division ratios, covering the MICS band and 433MHz and 915MHz ISM bands while consuming only 3.3 μW in MICS band. The wide locking range and low power consumption makes this very suitable for ...

An ultra-low power injection locked frequency divider (ILFD) is presented and demonstrated. Based on a 5-stage single ended ring oscillator, the ILFD achieves a lock range of 56% at a division ratio of 5 in the medical implant communications service (MICS) and the 433MHz ISM frequency bands. The ILFD is implemented in a 90nm CMOS process. It consumes 3 μW of power from a 1.0V supply and 100 μm ...