نتایج جستجو برای: tsv

تعداد نتایج: 599  

Journal: :Journal of the Korean Welding and Joining Society 2009

Journal: :Journal of Systems Architecture - Embedded Systems Design 2013
Satyajeet Nimgaonkar Mahadevan Gomathisankaran Saraju P. Mohanty

Embedded systems are ubiquitous in this era of portable computing. These systems are empowered to access, store and transmit abundance of critical information. Thus their security becomes a prime concern. Moreover, most of these embedded devices often have to operate under insecure environments where the adversary may acquire physical access. To provide security, cryptographic security mechanis...

2008
Magnus Rimskog Tomas Bauer

The Through Silicon Via (TSV) process developed by Silex provides down to 30 μm pitch for through wafer connections in up to 600 μm thick substrates. Integrated with MEMS designs it enables significantly reduced die size and true "Wafer Level Packaging" features that are particularly important in consumer market applications. The TSV technology also enables integration of advanced interconnect ...

2012
Annika Antonsson Seweryn Bialasiewicz Rebecca J. Rockett Kevin Jacob Ian C. Bennett Theo P. Sloots

Several different viruses have been proposed to play a role in breast carcinogenesis. The aim of this study was to investigate the prevalence of a subset of viruses in breast cancer tissue. We investigated the prevalence of 12 DNA viruses: EBV and CMV from the Herpesviridae family and SV40, BKV, JCV, MCV, WUV, KIV, LPV, HPyV6, HPyV7, and TSV from the Polyomaviridae family in 54 fresh frozen bre...

2013
Vinod Pangracious Zied Marrakchi Emna Amouri Habib Mehrez

A novel 3D Tree-based Multilevel FPGA architecture that unifies two unidirectional programmable interconnection network is presented in this paper. In a Tree based architecture, the interconnects are arranged in a multilevel network with the logic blocks placed at different Tree levels using ButterflyFat-Tree network topology. 2D physical layout development of a Tree-based multilevel interconne...

2011
Dae Hyun Kim Suyoun Kim Sung Kyu Lim

One of the most effective ways to minimize the area and capacitance overhead caused by through-silicon vias (TSVs) in 3D ICs is to reduce the size of TSVs themselves. Today, the diameter of the smallest TSV available is around 1μm, and it is expected to reach sub-micron dimensions in a few years. This downscaling of TSVs requires research on the impact of nanoscale TSVs on the quality of 3D IC ...

2010
H. W. van Zeijl P. M. Sarro

Lithography as developed for IC device fabrication is a high volume high accuracy patterning technology with strong 2 dimensional (2D) characteristics. This 2D nature makes it a challenge to integrate this technology in a 3 dimensional (3D) manufacturing environment. This article addresses the performance of a waferstepper (ASML PAS5000) in several 3D processes ranging form waferbonding and thi...

2007
Tomas Bauer

The Through Silicon Via (TSV) process developed by Silex offers sub 50 μm pitch for through wafer connections in up to 600 μm thick substrates. Silex via process enables MEMS designs with significantly reduced die size and true "Wafer Level Packaging" features that are particularly important in consumer market applications. The TSV technology also enables integration of advanced interconnect fu...

2013
Yi - Hang Chen

As compared to two-dimensional (2D) ICs, 3D integration is a breakthrough technology of growing importance that has the potential to offer significant performance and functional benefits. This emerging technology allows stacking multiple layers of dies and resolves the vertical connection issue by through-silicon vias (TSVs). However, though a TSV is considered a good solution for vertical conn...

2012
Hitesh Joshi Rajeev Mathur

In today’s era the demand of Very Large Scale Integrated Circuit (VLSI) is increase due to the growth of the Electronics industry. VLSI has high performance and high functionality at minimum cost and power dissipation. Continuously scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnects delays. The higher power consummation is due to long wiring networks and clock ...

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