Reconfigurable computational architectures are envisioned to deliver power efficient, high performance, flexible platforms for embedded systems design. The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer a tool flow to design sparsely interconnected 2D array processors with an arbitrary number of functional u...

Reconfigurable architectures provide power efficiency, flexibility and high performance for next generation embedded multimedia devices. ADRES, the IMEC Coarse-Grained Reconfigurable Array architecture and its compiler DRESC enable the design of reconfigurable 2D array processors with arbitrary functional units, register file organizations and interconnection topologies. This creates an enormou...

This paper presents a unit cell structure for liquid crystal (LC)-based reconfigurable reflective arrays, aimed at improving the imbalance in response time. Conventional LC-based reflectarray antenna cells, which have been widely used as high-gain beam-steerable antennas, an time because of different alignment LC molecules during rise and decay times. By separating metal layers contact with lay...

A dynamically reconfigurable large-scale multimicroprocessor system capable of operating as one or more independent SIMD (single instruction stream multiple data stream) machines and/or MIMD (multiple instruction stream multiple data stream) machines is described. The system consists of a Parallel Computation Unit, which contains N processors, N memory modules, and an interconnection network; Q...

An energy-efficient power-aware design is highly desirable for digital signal processing functions that encounter a wide diversity of operating scenarios in battery-powered intelligent wireless sensor network systems. To address this issue, we present a reconfigurable power-aware scalable Booth multiplier designed to provide low power consumption for DSP applications in highly changing environm...

The paper presents a new formal way of modeling and designing reconfigurable robots, in which case the robots are allowed to reconfigure not only structurally but also functionally. We call such kind of robots “self-evolvable”, which have the potential to be more flexible to be used in a wider range of tasks, in a wider range of environments, and with a wider range of users. To accommodate such...

FPGA-based reconfigurable systems allow the online adaptation to dynamically changing runtime requirements. However, the reliability of FPGAs, which are manufactured in latest technologies, is threatened not only by soft errors, but also by aging effects and latent defects. To ensure reliable reconfiguration, it is mandatory to guarantee the correct operation of the underlying reconfigurable fa...

As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable architectures targets static data stream oriented applications, optimizing very specific computational kernels, corresponding to the typical embedded systems characteristics in the past. Modern embedded devices, however, imp...