This work considers a methodology and its application in a memory system, in such a way that through well defined steps, it makes possible the use of not qualified memory components for space area with the specific degree of reliability. The methodology uses the application of the screening technique with the purpose to know the characteristics of reliability of these components and the elimina...

You cannot know the contents of a memory until after you have actually retrieved it. This paper considers the implications of this straightforward observation upon the psychological process of preference construction. We show that this constraint renders observers with random access memory susceptible to tail risks. We show that this difficulty can be rectified by permitting observers to weight...

The probabilistic RAM (pRAM) is a hardware-realizable neural device which is stochastic in operation and highly nonlinear. Even small nets of pRAMs offer high levels of functionality. The means by which a pRAM network generalizes when trained in noise is shown and the results of this behavior are described.

Efficient processing of top-k queries has become a classical research area. Fagin et al. proposed the “middleware cost” for a top-k query algorithm. In some scenario, there is no way to perform a random access, and Fagin et al. proposed NRA (No Random Access) algorithm for that. In this paper, we investigate the intrinsic relation between top-k queries and K-skyband queries. Based on that relat...

In terms of exact numbers, hard drives support somewhere around 140MB/sec of sequential reads/writes, but only 120I/O’s/sec when doing reads/writes on random 4KB chunks. This is because the disk must physically spin to the read/write location. RAM supports somewhere around 5-10GB/sec of reads/writes, with much less penalty for random access. SSDs/Flash is somewhere in the middle, but with the i...

Portable devices demand for low power dissipation. To reduce power dissipation, the subsystem in a device needs to be designed to operate at low power and also consume low power. Significant progress has been made in low power design of dynamic RAM’s. Static RAM’s are also critical in most VLSI based system on chip applications. Basic SRAM bit cell consists of 6T. Few designs using 4T are also ...

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Lorem ipsum dolor sit amet, consectetur adipiscing elit. Increasing dependence of the functionality and performance of computing system on the characteristics of the memory subsystem calls for further study on various memory technologies. Conventional memory technologies, such as SRAM, DRAM and FLASH, suffer from the formidable device scaling challenges, which makes researchers pay more attenti...

Title of dissertation: HEAP DATA ALLOCATION TO SCRATCH-PAD MEMORY IN EMBEDDED SYSTEMS Angel Dominguez Doctor of Philosophy, 2007 Dissertation directed by: Professor Rajeev K. Barua Department of Electrical and Computer Engineering This thesis presents the first-ever compile-time method for allocating a portion of a program’s dynamic data to scratch-pad memory. A scratch-pad is a fast directly a...