The demand of delivering faster, portable and highly reliable products is the major goal of low power VLSI subsystems and it cannot be maintained in all the situations. But it can be optimized to a certain extent by controlling some of the factors. Design of area and power efficient high speed data path logic systems are one of the substantial researches and the most crucial parameter that requ...

A fairly good amount of optimization can be achieved in PLA-based two-level realization of circuits using a proper choice of phases for the subfunctions. This paper presents a genetic algorithm-based approach for selection of output phases to optimize the PLA for area and power. The results obtained are superior to those reported in the literature. Finally, a trade-off has been made to perform ...

energy policy making in the third millennium is summarized in three areas. the first area: moving toward the use of renewable, clean and environment compatible energy, the second area: restructuring in the energy sector, to make it competitive, & finally, the third area is: increasing efficiency in energy consumption. power industry as a growing sub-section of energy sector, especially in recen...

Power dissipation in low powered devices is one of the most important considerations now days. It is very evident that hand held devices such as smart phones, calculators, tablets and laptops etc., which run on battery power, consume very low power for calculations and other operations. In this paper de-multiplexer has been designed using CMOS. In this paper the de-multiplexer has been designed...

This paper mainly focused on implementation of AES encryption and decryption standard AES-128. All the transformations of both Encryption and Decryption are simulated using an iterativedesign approach in order to minimize the hardware consumption. This method can make it avery low-complex architecture, especially in saving the hardware resource in implementing theAES InverseSub Bytes module and...

A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and featu...

this paper mainly focused on implementation of aes encryption and decryption standard aes-128. all the transformations of both encryption and decryption are simulated using an iterativedesign approach in order to minimize the hardware consumption. this method can make it avery low-complex architecture, especially in saving the hardware resource in implementing theaes inversesub bytes module and...

energy and mass transfer investigations in thermal processing of fruits serve as a breakthrough in the design and scale up of drying systems. diffusivity characteristics and specific energy consumption for drying of fig fruit in a laboratory scale microwave dryer were assessed. several intervals for microwave power intensity including 0.5, 1, 1.5, 2, and 2.5 w g-1, and 6 levels of power on-off ...

This paper addresses the issue of battery power conservation in wireless personal area networks (WPANs). Specifically, we consider a WPAN, which contains a processor and a disk drive, and develop a collaborative power management technique, which minimizes the total WPAN power consumption. Our approach is based on the theory of rational behavior, which leads to a collaborative architecture where...

with the advancement in semiconductor technology, chip density and power consumption in VLSI circuits has become a major problem consideration. More area and power consumption increases the packaging cost and reduces the battery life of the devices. Hence it’s necessary to design any VLSI circuits with less chip area and power consumption. In this paper an efficient full adder circuit is design...