The objective of this paper is to develop a tool to study the interaction between the cache coherence protocol and the media access protocol for a multiprocessor system in a wavelength division multiplexed star-coupled configuration. This simulation is modular for easy swapping of component functional specifications, and inter-module communication is achieved through a message passing facility....

The Alewife multiprocessor project focuses on the architecture and design of a large-scale parallel machine. The machine uses a low dimension direct interconnection network to provide scalable communication band-width, while allowing the exploitation of locality. Despite its distributed memory architecture, Alewife allows eecient shared memory programming through a multilayered approach to loca...

Crossbars are key components of communication switches used to construct multiprocessor interconnection networks. For a fixed number of nodes, larger crossbars result in reduced probability of conflicts and allows packets to traverse the network in fewer hops. However, increasing the size of the crossbar also increases the delay of the arbiter used to resolve conflicting requests. The increased...

We have studied a variety of switch architectures for use in the multistage interconnection network of a shared memory multiprocessor. In this paper, we describe a taxonomy of buffered switch architectures and give performance results for the different types we have defined. We investigate two techniques for improving network performance in the presence of contention: the use of multiple handsh...

Multiprocessors are quite suitable for task-based applications for the fact that they can support graceful degradation. However the uncertainty associated with the failure ,needs to be addressed for these systems. This paper proposes the fuzzy reliability model for multiprocessor interconnection systems, which takes into an account of uncertainty process. The effect of processor failure rate an...

Choosing a multiprocessor interconnection topology may depend on high-level considerations, such as the intended application domain and the expected number of processors. It certainly depends on low-level implementation details, such as packaging and communications protocols. We first use rough measures of cost and performance to characterize several topologies. We then examine how implementati...

The experimental optical interconnection module of the Free-Space Accelerator for Switching Terabit Networks (FAST-Net) project is described and characterized. Four two-dimensional (2-D) arrays of monolithically integrated vertical-cavity surface-emitting lasers (VCSEL's) and photodetectors (PD's) were designed, fabricated, and incorporated into a folded optical system that links a 10 cm x 10 c...