There is significant performance motivation to build larger and wider superscalar machines, however the implementation complexity can be overwhelming. When superscalar machines grow they necessarily become deeper in order to maintain frequency. As the pipeline depth increases the performance gained by a wide instruction fetch and dispatch is lost to branch misprediction penalty cycles. This wor...

Processor power is a complex function of device, packaging, microarchitecture, and application. Typical approaches to power simulation require detailed microarchitecture models to collect the statistical switching activity counts of processor components. In manycore simulations, the detailed core models are the main simulation speed bottleneck. In this paper, we propose an instruction-based ene...

In this paper we present an analytical model to predict the performance of general purpose applications on a GPU architecture. Themodel is designed to provide performance information to an auto-tuning compiler and assist it narrow the search to the more promising implementations. This work is based on the NVIDIAGPUs using CUDA (ComputeUnified Device Architecture). We analyze each CUDA kernel an...

High resolution peripheral quantitative quantitative computed tomography (HR-pQCT) permits in-vivo assessement of trabecular microstructure at an isotropic voxel size of 82μm. The new imaging modality has potential in the differentiation of certain forms of osteoporosis based on the associated microstructural patterns. In this paper we propose an approach that assesses bone microarchitecture ba...

A 3.7 teraflops Cray-Dell Linux cluster based on Intel Xeon processors will be installed at the Texas Advanced Computing Center early this summer. It will represent a transition from the T3E line of massively parallel processing systems that served researchers at The University of Texas. Code migration to an IA-32 microarchitecture will benefit from the adoption of new performance-enhancing arc...