A 1.5-GHz low noise amplifier (LNA), intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6m CMOS process. The amplifier provides a forward gain (S21) of 22 dB with a noise figure of only 3.5 dB while drawing 30 mW from a 1.5 V supply. In this paper, we present a detailed analysis of the LNA architecture, including a discussion on the effects of i...

In present day society where communication technologies are advancing at spiral rate, the need for efficient integrated circuit design to transmit and receive signals at unlicensed frequency spectrum is inevitable. This study tries to shed new light on the latter topic by evaluating the issues associated with the design in advanced CMOS technologies of a critical RF building block, namely a sin...

Received Nov 4, 2016 Revised Jan 8, 2017 Accepted Feb 17, 2017 The design of a low power amplifier for recording EEG signals is presented. The low noise design techniques are used in this design to achieve low input referred noise that is near the theoretical limit of any amplifier using a differential pair as input stage. To record the neural spikes or local field potentials (LFP’s) the amplif...

Wide frequency bandwidth has been internationally allocated for unlicensed operation around the oxygen absorption frequency at 60 GHz. A power amplifier and a low noise amplifier are presented as building blocks for a T/R-unit at this frequency. The fabrication technology was a commercially available 0.15 μm gallium arsenide (GaAs) process featuring pseudomorphic high electron mobility transist...

Abstract A differential Low-noise Amplifier (DLNA) using 0.13 μm CMOS technology is presented. The amplifier is optimized for Bluetooth Receiver applications operating in the 2.4 2.5 GHz band. The inductive degeneration topology used in the DLNA provides low noise, high gain and a large IIP3. The differential LNA was added a cascade output stage to the Single-ended source degenerated stage. Sim...

In this paper, a differential multi-band CMOS low noise amplifier (LNA), operated in a wide range from 800MHz~1700MHz, with wide-band interference rejection, linearity improvement and the capacitive cross-coupling technology, is proposed. The proposed differential multi-band CMOS low noise amplifier with high linearity performance and good interference rejection performance. The post-simulation...

ETRI Journal, Volume 29, Number 5, October 2007 ABSTRACT⎯An ultra-wideband low-noise amplifier is proposed with operation up to 8.2 GHz. The amplifier is fabricated with a 0.18-μm CMOS process and adopts a twostage cascode architecture and a simplified Chebyshev filter for high gain, wide band, input-impedance matching, and low noise. The gain of 19.2 dB and minimum noise figure of 3.3 dB are m...

At receiving front end, the low noise amplifier design, being the first building block to receive the signal puts a tremendous challenge on modern day radio frequency engineers to meet real world problems involving trade-off in design issues. In this paper the recent trends for noise figure are streamlined in concurrence to Ultra Wide Band (UWB) radio transmission spectrum. A comparative study ...