A dynamic and optimal shop floor design, modelling and implementation is key to achieving successful Fractal Manufacturing System (FrMS). To build adaptive and fault-tolerant fractal layout, attention is paid to issues of shop floor planning, function layout, determination of capacity level, cell composition planning and flow distances of products. A full fledged FrMS. layout is multi-functiona...

Abstract. This paper presents a heuristic building block for wind farm layout optimization algorithms. For each pair of wake-interacting turbines, vector is defined. Its magnitude proportional to the speed deficit waked turbine due waking turbine. direction chosen from inter-turbine, downwind, or crosswind directions. These vectors can be combined all turbines and averaged over resource obtain ...

<span>Millimeter wave communication systems with antenna beamforming facilitates practical solutions to the capacity crunch issues in upcoming 5G wireless networks. Multi-cell dense networks are prone three major interferences-inter-cell, intra-cell and Inter layer interference-the most dominating being inter-cell interference. This paper focuses alleviate interference using hybrid (HBF) ...

This paper addresses to the Cell Formation Problem (CFP) in which Automated Guided Vehicles (AGVs) have been employed to transfer the jobs which may need to visit one or more cells. Because of added constraints to problem such as AGVs’ conflict and excessive cessation on one place, it is possible that AGVs select the different paths from one cell to another over the time. This means that the ti...

A high-performance ASIC has been developed to serve as the interface for the 10-ns bus in the new AlphaServer 8000 series server systems from Digital. The CMOS standard-cell alternative (CSALT) technology provides a timing-driven layout methodology together with a correct-by-construction approach for managing the complex device physics issues associated with state-of-the-art CMOS processes. The...

Printed circuit board layout inspection methods are mostly based on local geometric information, therefor they are well suited to the CNN paradigm. Here the detection of two layout errors is considered namely, the breaks in the wires and some kind of short circuits. The designed analogic algorithms to solve the problems above were tested on real life examples using an experimental system based ...

| The paper proposes a new layout-driven multi-level logic factorization methodology for regular arrays of two-input cells, that can nd practical applications in ne-grain FPGA design, standard cell, gate matrix layout and sub-micron technologies. A new factorization algorithm for AND/OR/EXOR logic with multi-valued literals is introduced, that has application to minimization of Logic Cell Array...

This paper presents a hierarchical genetic algorithm (GA) to solve the cell formation and layout decisions of cellular manufacturing. The intrinsic features of our proposed GA include using a hierarchical chromosome structure to encode concurrent cell design and layout decisions, developing a new selection scheme to dynamically considering two highly correlated fitness functions, and proposing ...

The multipliers are the key structure for designing high performance digital systems. Design considerations of multiplier include high speed, less power consumption, less PDP (power-delay product) and regularity of layout. These design parameters make it suitable for various compact low power VLSI implementations. This paper presents an application of the proposed XNOR-XOR cell for a 2x2 array ...