In recent years, thermal sensing in digital devices has become increasingly important. From a security perspective, new thermal based attacks have revealed vulnerabilities in digital devices. Traditional temperature sensors using analog-to-digital converters consume significant power and are not conducive to rapid development. As a result, there has been an escalating demand for low cost, low p...

A single chip system is designed, implemented, tested and analyzed for the measurement of velocity from incremental optical encoders with quadrature outputs. The system uses a field programmable gate array (FPGA) chip to take advantage of high flexibility and a low cost design cycle. The device uses two counting methods: period counting for low velocities and frequency counting for high velocit...

Abstract: This work presents a comparison of three different modulation techniques applied to modular multilevel converters (MMCs). The three modulation strategies studied in this paper are the phase-shifted sinusoidal pulse width modulation (PS-SPWM), the space-vector modulation (SVM) and the nearest level modulation (NLM). This paper focuses on analysing the particularities and implementation...

Proportional Integral Derivative (PID) controller is the most preferable controller in industries that does not require precise analytical model of the system to be controlled. Implementation of PID controllers has gone through several stages of evolution from the early mechanical and pneumatic designs to the microprocessor based systems. Recently “Field Programmable Gate Array” has become an a...

This paper begins with a short discussion of the basic concepts of reconfigurable computing. Configuration is the process of programming a field-programmable gate array (FPGA) device for implementing a certain logic function. Configuration can be either static or dynamic. In static configuration the FPGA device retains its configuration state till the task is completed. In dynamic configuration...

In this paper a PID controller is designed and it’s implemented on Field Programmable Gate Array (FPGA) by two method: in first method PID controller is designed in time domain and in second method PID is designed in frequency domain (Z domain) and final two method compare together. The filter that designed in time domain is more accurate than other method.

In this paper, we propose an iterative area/performance tradeoff algorithm for look-up table (LUT)-based field programmable gate array (FPGA) technology mapping. First, it finds an area-optimized, performance-considered initial network by a modified area optimization technique. Then, an iterative algorithm consisting of several resynthesizing techniques is applied to trade the area for the perf...

In this paper, some of the recent advances in the concept of FPGA is presented, which is a presentation made as a part of the UG seminar work. Designing hardware with Field-Programmable Gate Arrays (FPGAs) avoids the higher non-recurring engineering costs and longer development times of Mask-Programmed Gate Array (MPGA) solutions. These two key advantages, shorter design cycles and lower develo...

Field programmable gate array (FPGA) makes rapid pro-totyping an easier task, and is useful in many applications due to its growing speed and capacity. In this paper, we present a rectiication method for look-up table type FPGA's. Instead of changing the netlist of a circuit, we only modify functionality realized by look-up tables and keep the netlist equal so that there will be no change on th...

Globally Asynchronous Locally Synchronous techniques have been developed over recent years as they allow some of the advantages of asynchronous circuits to be integrated into synchronous designs. This has been applied to ASICs, but not FPGAs. We propose using these techniques to improve the routing of FPGAs targeted at synchronous designs.