The type and dosage of flocculants used in the middle thickener copper-molybdenum plant, addition to adjusting quality recycled process water, is very effective on floatability molybdenite. In this study, effect starch-based flocculant (wheat starch) was investigated efficiency molybdenite flotation, molybdenum processing plant. First, sampling from overflow underflow Mo circuit (in industrial ...

The efficiency of grinding and flotation process in copper-molybdenum processing circuit, largely affected by performance thickeners hydrocyclones devices. goal this paper is to investigate the effect rate-limiting factors on these devices consequently separation molybdenum circuit. So, a full mineralogical study have been carried out outputs hydrocyclone molybdenite According results, coarse-g...

Flotation is the most important process for concentrating mineral ores. This process may occur in any vessel such as column flotation, which has been used widely during the last decade and the conventional flotation cells. The effect of superficial feed velocity on the copper recovery was investigated using pilot-scale column flotation of "Sarcheshmeh Capper Complex". The results were compa...

AbstractThe purpose of this study was to investigate the controllable operating parameters influence, including pH, solid content, collector, co-collector, and depressant dose, and conditioning time, on apatite flotation kinetics. Four first order flotation kinetic models are tested on batch flotation time-recovery profiles. The results of batch flotation tests and the fitting of first-order ki...

We propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local optimization heuristic which is a modification of Fiduccia-Matheyses algorithm. Using well-known benchmarks (including ACM/SIGDA benchmarks), the combination of genetic algorithm and the local heuristic performed better than hMetis, a represent...

A technique is introduced to enable the simulation of floating-gate transistors within standard analogue circuit simulators, such as SPICE. This technique can be used in all types of circuit simulations, ranging from DC sweeps to charge-modification scenarios. The technique is then used to simulate several analogue circuits, the results of which show strong agreement with identical circuits fab...

A substrate-triggered technique is proposed to improve electrostatic discharge (ESD) protection efficiency of ESD protection circuits without extra salicide blocking and ESD-implantation process modifications in a salicided shallow-trench-isolation CMOS process. By using the layout technique, the whole ESD protection circuit can be merged into a compact device structure to enhance the substrate...

A latchup current self-stop methodology and circuit design, which are used to prevent damage in the bulk CMOS integrated circuits due to latchup, are proposed in this paper. In a bulk CMOS chip, the core circuit blocks are always latchup sensitive due to a low holding voltage of the parasitic SCR path. The proposed latchup prevention methodology and circuit design can detect and stop the occurr...