The recent growth of battery-powered applications has increased the need for high-efficiency step-up dc-dc converters. conversion is commonly used in several applications, such as electric vehicle (EV); plug-in hybrid vehicles (PHEV); photovoltaic (PV) systems; uninterruptible power supplies (UPS); and fuel cell systems. input current shared among inductors by paralleling converters; resulting ...

In this paper, we describe a novel circuit consisting of N + 1 MOS transistors and a single floating gate which computes n soft maximumof N current inputs and reflects the result in the output transistor. An intuitive description of the operation of the circuit is given. Data from a working two-input version of the circuit is presented and discussed. The circuit features a high output voltage s...

In this paper, a new type of interleaved high step-up converter including coupled inductor is proposed. The proposed has an configuration on the input side to reduce ripple current and increase power level. Moreover, stacked structure output provides input/output (I/O) voltage gain. addition, can avoid extreme duty cycle, causing larger conduction losses, by combining lossless clamp circuit wit...

This paper proposes a new power-factor-correction (PFC) topology, and explains its operation principle, its control mechanism, related application problems followed by experimental results. In this proposed topology, critical-conduction-mode (CRM) interleaved technique is applied to a bridgeless PFC in order to achieve high efficiency by combining benefits of each topology. This application is ...

This paper presents a 12-bit 2.32 GS/s time-interleaved pipelined/successive-approximation register (SAR) hybrid analog-to-digital converter (ADC) implemented in 28 nm CMOS. To achieve high-linearity at several GS/s, pseudo-differential push-pull input buffer with floating-body technique is proposed. A pipelined/SAR architecture dual-channel sampling multiplying digital-to-analog (MDAC) and one...