We present an environment to accelerate fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is frequently used throughout the test generation process. We studied the feasibility of using reconfigurable hardware emulator instead of software simulation. Experiments showed that it is beneficial to use emulation for circuits/met...

In this paper we first show that standard BP algorithm cannot yeild to a uniform information distribution over the neural network architecture. A measure of sensitivity is defined to evaluate fault tolerance of neural network and then we show that the sensitivity of a link is closely related to the amount of information passes through it. Based on this assumption, we prove that the distribu...

|Test generation using deterministic fault-oriented algorithms is highly complex and time-consuming. New approaches are needed to augment the existing techniques, both to reduce execution time and to improve fault coverage. In this work, we describe a genetic algorithm (GA) framework for sequential circuit test generation. The GA evolves candidate test vectors and sequences, using a fault simul...

Different fault reasoning techniques are used in fault localization for either deterministic or probabilistic fault causality model. Symptom-Fault map is commonly used to describe Symptom-Fault causality in fault reasoning. However lost and spurious symptoms severely affect both performance and accuracy of fault reasoning. In this paper, we propose an extended Symptom-Fault-Action model to inco...

This paper presents an intelligent fault detection based on adaptive continuous wavelet transform of broken rotor bars for Induction Motor (IM). Broken rotor bars, bearing decay, eccentricity, as motor faults appears as different frequencies in the stator current signals. The stator current and speed signals at deferent operation conditions obtained from the winding function are analysed throug...

An alternative way to have a fault less system is Fault Tolerant System, Triple Modular Redundancy (TMR) is used for making a fault tolerant system.. FPGA platform used in Altera Cyclone kit and Altera Quartus software is for functional and timing simulation. This model not only detects the faulty processor but also repair the faulty bits in the faulty processor .Fault detection are done over t...

Transient stability analysis plays an important role for planning, designing and upgrading an existing electrical power system network. In this paper, transient stability analysis is carried out by considering a three-phase fault at the busbars 7 and 4 with the effect of various fault-clearing times. The simulation is carried out using CYME 5.02 power system software with fast decoupled method....

A model is presented which describes the uncoiling process of a rolling mill in fault-less and in faulty situations. This model is implemented in the DYMOLA modelling and simulation environment. It is used for two purposes: first for the simulation of the unwinding process and second for model-based fault diagnosis. For the latter diagnostic task, a simplified model is derived. Results of the s...

To provide a computing system to be dependable fault tolerance mechanisms have to be included. Especially massive parallelism represents a new challenge for fault tolerance. In this paper we discuss basic hardware fault tolerance measures for massively parallel multiprocessors and solutions realized for and integrated into different multiprocessor architectures. Further we present our validatio...

on 11th of august 2012 the region was surprisingly struck by a shallow mw 6.4 (usgs) earthquake with pure right-lateral strike-slip character only about 50 km north of the north-tabriz fault. an east-west striking surface rupture of about 20 km length was observed in the field by geological survey of iran. only 11 minutes later and about 6 km further nw a second shallow event with mw 6.2 occurr...