This paper presents new application-specific digital signal processor (ASDSP) instructions and their hardware accelerator to efficiently implement Reed-Solomon (RS) encoding and decoding, which is one of the most widely used forward error control (FEC) algorithms. The proposed ASDSP architecture can implement various programmable primitive polynomials, and thus, hardwired RS codecs can be repla...

Sonar is the ear and the eye of the submarine. The core of the sonar composes of the DSP processor, hardware, along with the software. Thus, solving the determination of the best DSP processor among the alternatives problem is an important one. Moreover, handling it requires incorporating both quantitative and qualitative factors into the process, which makes the problem a complex real-life mul...

In this paper, a digital signal processor (DSP) with programmable correlator array architecture is presented for third generation wireless communication system. The programmable correlator array can be reconfigured as a chip match filter, code group detector, scrambling code detector, and RAKE receiver with low power consideration. The architecture and instruction set of the proposed DSP are sp...

This paper presents the design and implementation of a novel VLIW digital signal processor (DSP) for multimedia applications. The DSP core embodies a distributed & ping-pong register file, which saves 76.8% silicon area and improves 46.9% access time of centralized ones found in most VLIW processors by restricting its access patterns. However, it still has comparable performance (estimated in c...

Results for linear and wide-dynamic range compression were compared with a new 64-channel digital amplification strategy in three separate studies. The new strategy addresses the requirements of the hearing aid user with efficient computations on an openplatform digital signal processor (DSP). The new amplification strategy is not modeled on prior analog strategies like compression and linear a...

The Retinex is a general-purpose image enhancement algorithm that is used to produce good visual representations of scenes. It performs a non-linear spatial/spectral transform that synthesizes strong local contrast enhancement and color constancy. A real-time, video frame rate implementation of the Retinex is required to meet the needs of various potential users. Retinex processing contains a r...

In this paper, delay and transient power-supply current (IDDT) testing has been applied for a 90nm VLIW DSP IP core, to demonstrate the IDDT testing an effective alternative of delay testing to detect aging degradation. The test environment for validation, implementing an accelerated test (AT) has been investigated, delay and IDDT measurement data resulting from AT is presented and analysed. It...

Although we find it an efficient method to observe characteristics of the signal surface, on-line eigenanalysis is still not commonly in use in digital signal processing applications. By performing eigendecomposition on a signal correlation matrix, several DSP problems such as spectral estimation and adaptive filtering can be solved. Calculating eigenvalues and eigenvectors of the Signal Autoco...

Advanced process technology and system-integration provide the driving forces behind silicon convergence. FPGAs speed along this trajectory, having already integrated SRAM memories, digital signal processing (DSP) and multiplier blocks, serial transceivers, memory controllers, and advanced I/O functions. The latest advancement in programmable technology is the SoC, which integrates an Altera® F...

For the increasing demands of computation, heterogeneous multicore architecture is believed to be a promising solution fulfill edge computational requirement. In FPGAs, realized as multiple soft processor cores with custom processing elements. Since FPGA resource-constrained device, sharing hardware resources among can advantageous. A few research works have focused on resource between processo...