144606-7171-IJET-IJENS © December 2014 IJENS I J E N S Abstract— This paper shows the design of a broadband low noise amplifier (LNA) for ultra-wideband (UWB) applications. The proposed LNA uses cascode configuration technique followed by an inductive inter-stage network to realize the flat gain throughout the UWB band. The inductive inter-stage network is cascaded to a common source amplifier ...

A highly selective impedance transformation filtering technique suitable for tunable selective RF receivers is proposed in this paper. To achieve blocker rejection comparable to SAW filters, we use a two stage architecture based on a low noise trans-conductance amplifier (LNTA). The filter rejection is captured by a linear periodically varying (LPV) model that includes band limitation by the LN...

This paper presents a passive mixer combined with a 1st-order active low-pass filter implemented in a purely digital low-power 65 nm CMOS technology. The filter consists of a four-stage operational amplifier with two feed-forward paths for a 3 dB corner frequency of 4 MHz. The mixer offers a very low flicker noise corner frequency of 80 Hz for DVB-H application. A fabricated test chip with inte...

This paper presents an ultra-wideband (UWB) low noise amplifier (LNA) consuming 2.2-mW core dc power for 6-8.5GHz wireless applications. A common-gate input stage is cascaded with a common-source second stage to perform input impedance matching and wideband stagger-tuning amplification, while the current-reuse topology minimizes the dc power dissipation. The design method used to achieve flat-g...

In this paper, a CMOS low-noise amplifier (LNA) with a new input matching topology has been proposed, analyzed and measured. The input matching network is designed through the technique of capacitive feedback matching network. The proposed LNA which is implemented in a 0:18-mm1P6M CMOS technology is operated at the frequency of 12.8GHz. It has a gain S21 of 13.2 dB, a noise figure (NF) of 4.57 ...

The main focus of this paper is to design a “Low noise amplifier” for radio frequency applications using MOS 180nm technology. In modern RF electronics, we rarely design an LNA in isolation. Rather, we view and design the RF chain as one entity, performing many iterations among the stages. A low power MOS low noise amplifier (LNA) working at 2.4GHz for ZigBee communication is presented in this ...

This paper presents an ultra-low voltage and low power current bleeding CMOS double balanced mixer targeted for ZigBee application in 2.4GHz frequency band. It introduces and discusses a modified CMOS based current bleeding mixer topology adopting a combination of NMOS current bleeding transistor, with a PMOS Local Oscillator (LO) switching stage and integrated inductors to achieve ultra-low vo...

I. ABSTRACT We present a Gallium Nitride (GaN) Lamb Wave resonator using a Phononic Crystal (PnC) to selectively confine elastic vibrations with wide-band spurious mode suppression. A unique feature of the design demonstrated here is a folded PnC structure to relax energy confinement in the non-resonant dimension and to enable routing access of piezoelectric transducers inside the resonant cavi...

High-performance multistage data converters and sub-sampling frequency downconverters typically require track and hold amplifiers (THAs) with high sampling rates and high linearity. This paper presents a THA for sub-sampling communications applications based on a diode bridge design with high-speed Schottky diodes and an improved current source approach for enhanced linearity. Implemented in a ...

Abstract: The effect of using a tuning inductance on the performance of a Gilbert cell-based two level transistor CMOS sub-harmonic mixer is investigated. The tuning inductor used between the RF and LO switching stages causes conversion gain enhancement and noise figure improvement. Additionally, it compensates LO distortion due to the phase mismatch of LO signals in the sub-harmonic mixer. The...