Due to continuous scaling of CMOS, stability is a prime concerned for CMOS SRAM memory cells. As scaling will increase the packing density but at the same time it is affecting the stability which leads to write failures and read disturbs of the conventional 6T SRAM cell. To increase the stability of the cell various SRAM cell topologies has been introduced, 8T SRAM is one of them but it has its...

This study presents the design of low power 9T SRAM cell using dynamic domino logic to achieve low power dissipation. The internal structure of the proposed 9T SRAM has cross coupled dynamic inverters which periodically updates the internal node voltage levels which, increase the read and write stability of the circuit. The SRAM design also has charge keeper transistor which resolves the proble...

The multi-infeed effective short-circuit ratio (MESCR) is widely used in indicating the strength of multi-infeed AC/DC power systems. However, when the widely used MESCR was adopted to evaluate the stability margin of the Eastern China Grid including three infeed ultra-high-voltage DC (UHVDC) and five high-voltage DC transmission lines in 2016, the MESCR result indicated the system was strong e...

0038-1101/$ see front matter 2010 Elsevier Ltd. A doi:10.1016/j.sse.2010.06.009 * Corresponding author. E-mail addresses: [email protected] (R.W. Ma Wang), [email protected] (S. Nalam), sk4fs@virgin us.ibm.com (G. Braceras), [email protected] (H. Pilo) Calhoun). Large scale 6T SRAM beyond 65 nm will increasingly rely on assist methods to overcome the functional limitations associated with scal...

A constant voltage regulator, to supply constant power loads, is realized using a Switched-capacitor converter. Exhaustive studies have been carried out to find the suitability of available control schemes and finally one control scheme investigated with (i) operation of the converter at different crossover frequencies (ii) operation of the converter at different phase Margins. Various operatin...

The development of low-voltage SRAM bitcells with ultra-low static power consumption has become a primary focus of memory design in recent years. The analysis of these bitcells requires the evaluation of dynamic noise margin metrics in addition to the traditional static noise margins. In this paper, we extend the presentation of our recently proposed quasi-static RAM (QSRAM) cell that employs a...

There is cause and effect relationship between increase in load due to increasing penetration of electric vehicles (EV) load that causes unbalanced conditions and affect the power quality such as voltage degradation and even damage the equipment if the system is not properly managed. This paper presents detailed review of energy supply and management in conjunction with load synchronization thr...

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In the present scenario of the power system the main issue is the voltage stability enhancement which plays an important role in the complex network. This paper introduces the forthcoming technology employing the integration of Flexible AC transmission System (FACTS) device in to the system. Betwixt of all the FACTS devices this paper mainly rivet on Unified Power Flow Controller (UPFC). This i...

The Challenge A main bottleneck precluding the on-chip integration of a switching power converter for energy management purposes is the large area of the reactive components, the resulting high output ripples and the tendency to exhibit fast-scale instabilities. Through a compact IC-suitable circuit, the presented innovation extends the design space by concurrently decreasing the size of reacti...