Fully-depleted SOI devices are being considered for low power applications due to their threshold voltage, sub-threshold slope and capacitance advantages over other technologies. However, the threshold voltage of a fully-depleted SOI device is a strong function of the silicon film and sacrificial oxide thicknesses. Thus, to fully realize the advantages of fully-depleted SOI devices in commercia...

Novel device architectures such as ultra-thin body silicon-on-insulator (UTB SOI) MOSFETs which are more resistant to some of the sources of intrinsic parameter fluctuations are expected to play an increasingly important role beyond the 45 nm technology node. Apart from reduced device variability UTB SOI SRAM would benefit considerably from the superior electrostatic integrity and reduced junct...

An overview of the present silicon-on-insulator (SOI) waveguide technology is given and supplemented with an extensive set of theory and simulation results. Characteristics of slab-, rectangularand ridge waveguides in SOI are explained. In particular, the number of modes and the single-mode conditions are carefully analyzed. Experimental work with straight and bent 8 to 10 μm thick SOI ridge wa...

Among the open-literature on pulse-position-modulation (PPM) radiowave wireless communications, this work is first to advance a semi-‘blind’/‘blind’ spatial-rake receiver with interference-rejection capability. This proposed adaptive ‘smart antennas’ detector uses the signal-of-interest’s (SOI) earlier decoded information-symbols to segment earlier collected data into two data-groups: one data-...

Applications involving smart cards have rapidly emerged since a few years. Up to now, chips are realized in conventional bulk technology. But as the need for performance rises, alternative technologies must be investigated. In this paper we study the feasibility of realizing the blocks for a smart card chip in Silicon-On-Insulator (SOI) technology. For most of the circuit blocks, SOI realizatio...

The present work considers electrothermal simulation of LDMOS devices and associated nonequilibrium effects. Simulations have been performed on three kinds of LDMOS: bulk Si, partial SOI and full SOI. Differences between equilibrium and nonequilibrium modeling approaches are examined. The extent and significance of thermal nonequilibrium is determined from phonon temperature distributions obtai...

This study involves a correlation between two measures of creativity: the Torrance Tests of Creative Thinking (TTCT) and the divergent production subtests of the Structure of Intellect Learning Abilities Test (SOI-LA). A population of 263 junior high school and senior high students from Louisiana were tested with both the TTCT and the SOI-LA. Results from the study indicate that the SOI-LA is a...

With the ultimate goal of creating autonomous microrobots, we have developed a new five-mask process that combines two polysilicon structural layers with 35 μm thick SOI structures and a backside substrate etch. The polysilicon layers provide 3D hinged structures, high compliance structures, and electrical wiring. The SOI structural layer yields much stronger structures and large-force actuator...

The Statistics of Income (SOI) Division of the Internal Revenue Service (IRS) produces data using information reported on tax returns. These administrative data are used by the Department of the Treasury, the Joint Committee on Taxation, and various Federal statistical agencies and are disseminated to the public via the World Wide Web and publications such as the SOI Bulletin. The Corporate For...

A correlation between the gated-diode R-G current and the performance degradation of SOI n-channel MOS transistor after F-N stress test has been demonstrated in this paper. Due to increase of interface traps after F-N stress test, the generation-recombination (R-G) current of the gateddiode in the SOI-MOSFET architecture increases while the performance characteristics of MOSFET transistor such ...