A generic analytical performance model of singlechannel wormhole routers is presented using the M/D/1/B queuing theory. Compared with previous work, the flowcontrol feedback mechanism is studied in detail, and a computing method bases on Markov chain for the flowcontrol feedback probability is proposed. Compared with BookSim, a well-known cycle-accurate Network-on-Chip (NoC) simulator, this mod...

Approaching ideal wire latency using a network-on-chip (NoC) is an important practical problem for many-core systems, particularly hundreds-cores. Although other researchers have focused on optimizing large meshes, bypassing or speculating router pipelines, or creating more intricate logarithmic topologies, this paper proposes a balanced combination that trades queue buffers for simplicity. Pre...

The Network-on-Chip (NoC) is an enabling technology to integrate large numbers of embedded cores on a single die. The existing methods of implementing a NoC with planar metal interconnects are deficient due to high latency and significant power consumption arising out of multi-hop links used in data exchange. To address these problems, we propose design of a hierarchical small-world wireless No...

As chip complexity keeps increasing in system-on-chip (SoC), the on-chip interconnect has become a critical issue for large-scale chip design. It has been proposed that the packet-switched network exchanging messages between intellectual property (IP) cores is a viable solution for the SoC interconnect problem. The design of the router in such network-on-chip (NoC) architectures is the key to h...

Electrical discharge machining process is one of the most Applicable methods in Non-traditional machining for Machining chip in Conduct electricity Piece that reaching to the Pieces that have good quality and high rate of machining chip is very important. Due to the rapid and widespread use of alloy DIN1.2080 in different industry such as Molding, lathe tools, reamer, broaching, cutting guillot...

Article history: Received 11 June 2012 Received in revised form 22 April 2013 Accepted 30 June 2013 Available online 6 July 2013

In this paper we present an approach for the analysis of systems of parallel communicating processes, with regard to Network-on-Chip applications. We present a method to detect communications that synchronize the program flow of two or more processes. These synchronization points set the processes into relation and allow the determination of the global timing behavior of such a system. Using th...

for providing me with an opportunity to carry out my master thesis project at the department of electrical engineering at the university. I thank him for his support and encouragement throughout the project. for his valuable suggestions and ideas regarding my project during the discussions in the PROMES meetings. I am especially grateful to Ir. Sander Stuijk, who guided me throughout the projec...

http://dx.doi.org/10.1016/j.compeleceng.2014.08.005 0045-7906/ 2014 Elsevier Ltd. All rights reserved. q Reviews processed and recommended for publication to the Editor-in-Chief by Guest Editor Dr. Masoud Daneshtalab. ⇑ Corresponding author. E-mail addresses: [email protected] (A. Demiriz), [email protected] (N. Bagherzadeh), [email protected] (O. Ozturk). Ayhan Demiriz a,⇑, Nader Bagherzad...