The implementation of Low Noise Amplifier (LNA) front-ends is one of the challenging aspects in emerging Ultra Wide-Band (UWB) radio frequency (RF) systems. As it is highly desirable to achieve complete system-on-chip (SoC) integration, several CMOS based LNA implementations have been reported recently. The first part of this thesis presents a comparative study that helps designers understand t...

A Ka-band monolithic low-noise amplifier (LNA) with high gain and dynamic range (DR) has been designed implemented in a 100-nm gallium nitride (GaN)-on-Si technology. The LNA is as the first stage of DR receiver an frequency modulated continuous wave (FMCW) radar for detection small drones. three-stage microwave integrated circuit (MMIC) linear 26 dB noise figure (NF) 2 band 33-38 GHz. output 1...

InP high electron mobility transistors (InP HEMTs) with different spacer thickness 1 to 7 nm in the InAlAs-InGaAs heterostructure have been fabricated and characterized at 5 K respect electrical dc rf properties. The HEMT noise performance was extracted from gain measurements of a hybrid low-noise amplifier (LNA) equipped discrete transistors. When biased for optimal operation, LNA using HEMTs ...

In this article, a novel concept is introduced to improve the radio frequency (RF) linearity of partially-depleted (PD) silicon-on-insulator (SOI) MOSFET circuits. The transition due to the non-zero body resistance (RBody) in output conductance of PD SOI devices leads to linearity degradation. A relation for RBody is defined to eliminate the transition and a method to obtain transition-free c...

A low-noise amplifier (LNA) and mixer circuit in 0.35m CMOS operates at 2.1 GHz. Merging the LNA and mixer lowers the number of transistors in the signal path and thereby also the nonlinearity and power consumption. The circuit meets the specifications for a direct conversion wide-band code-division multiple access (WCDMA) receiver. Its noise figure is 3.4 dB (5 kHz to 5 MHz), the total convers...

This paper presents a wideband low-noise amplifier (LNA) designed to be used as the first stage of the receiver in the Square Kilometer Array radio telescope. The LNA design procedure and its layout features are discussed. The noise figure optimization procedure determines the signal-source resistance that results in reduced noise figure. When used in the radio telescope, the required signal-so...

Wafer-level packaging (WLP) technology offers novel opportunities for the realisation of highquality on-chip passives needed in RF front-ends. IMEC proposes thin-film WLP technology in combination with 90nm CMOS as a cost-effective approach to integrate RF and microwave systems. The potential of this technology is assessed by means of two demonstrator sub-circuits: a low-power voltage-controlle...

A V-band low-noise amplifier (LNA) with electrostatic discharge (ESD) protection using RF junction varactors is demonstrated in a 65-nm CMOS technology. The gate-source junction varactor is used to achieve a power-constrained simultaneous noise and input matching, and also as an auxiliary ESD protection for the NS and ND modes. The measured results shows an over 2.0-kV ESD protection in the PD ...

In this paper, a low noise amplifier (LNA) in a 0.35 μm SiGe BiCMOS technology for WCDMA applications is presented. The designed LNA exhibits a noise figure of 1.65 dB and a power gain of 20 dB. Besides, two different base bias circuits are integrated in the LNA. One is a conventional resistor feed circuit, and the other is an active feed circuit. By using the active biasing technique for the b...

The design of a multi-band low noise amplifier (LNA) is the first obstacle towards the design of a multi-standard receiver. In this paper, an approach for the design of a multi-band LNA for DECT and Bluetooth is presented. The formula for a minimal noise factor of a LNA, that takes into account the finite quality factor of the inductors is derived and the full design procedure that facilitates ...