MorphoSys is a reconfigurable architecture for computation intensive applications. It combines both coarse grain and fine grain reconfiguration techniques to optimize hardware, based on the application domain. M2, the current implementation, is developed as an IP core. It is synthesized based on the TSMC 0.13 micron technology. Experimental results show that for multimedia applications MorphoSy...

MorphoSys is a reconfigurable architecture for computation intensive applications. It combines both coarse grain and fine grain reconfiguration techniques to optimize hardware, based on the application domain. M2, the current implementation, is developed as an IP core. It is synthesized based on the TSMC 0.13 micron technology. Experimental results show that for multimedia applications MorphoSy...

This paper proposes a disk and file system design scheme that achieves effective utilization of disk bandwidth for retrieving MPEG-2 programs in a video-on-demand server. The scheme is based on a general two-level disk array architecture that exploits both parallelism and concurrency offered by fine-grain and coarse-grain disk array structures. This paper also presents a design procedure to fig...

Cryptographic algorithms are increasingly used in personal transaction through Internet network, smart card and telecommunication applications. Those algorithms are well known for their high complexity data computing. This paper focuses on Montgomery algorithm, which computes modular multiplication efficiently. This operation is the most time consuming part of public-key cryptosystems. A compar...

The main idea behind UPC is that users should be able to view the underlying machine model as a collection of threads operating in a common global address [5]. In such an environment fine-grain algorithms are preferred to coarse-grain algorithms since they are easier to code. While such algorithms, written in UPC, should have similar performance in shared memory environments compared to OpenMP,...

This paper addresses issues of task clustering-the coalition of several fine grain tasks into single coarser grain tasks called task clusters+md task cluster scheduling on distributed processors. The performance of various scheduling schemes is studied and compared f o r a variety of workloads. Simulation results indicate that the scheduling policy that gives priority to the cluster with the ,s...

We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data throughput with fine-grain pipelined asynchronous circuits. We show how the PAPA architecture maintains most of the speed and energy benefits of a custom asynchronous design, while also providing post-fabrication logi...

a r t i c l e i n f o It is well known that strong concurrent precipitation, mainly located along grain/subgrain boundaries, results in a coarse and elongated grain structure, and unusual sharp P {011} b566N and/or M {113} b110N texture components during annealing of supersaturated AA3xxx-series alloys. In this study, a supersaturated as-cast Al–Mn– Fe–Si alloy was annealed at three temperature...

Median grain sizes on riverbeds range from boulders in uplands to silt in lowlands; however, rivers with ~1–5mm diameter bed sediment are rare. This grain size gap also marks an abrupt transition between graveland sand-bedded reaches that is unlike any other part of the fluvial network. Abrupt gravel-sand transitions have been attributed to rapid breakdown or rapid transport of fine gravel, or ...

Providing efficient support for interactive operations such as fast-forward and fast-backward is essential in video-on-demand and other multimedia server systems. In this paper, we present two basic approaches for scheduling interactive operations, the prefetching approach and the grouping approach. Scheduling algorithms are presented for both fine-grain and coarse-grain data blocks. These algo...