The interface trap charges (ITC) associated reliability analysis of a charge-plasma based asymmetric double-gate (ADG) dopingless tunnel field effect transistor (DLTFET) with Si/Ge heterojunction and high-κ gate dielectric (HJADGDLTFET) has been studied. HJADGDLTFET uses silicon at the drain channel region, germanium source which enhances band-to-band tunnelling source-channel junction, hence d...

We have modeled the field and space charge distributions in back-gate and top-gate nanowire field effect transistors by solving the three-dimensional Poisson's equation numerically. It is found that the geometry of the gate oxide, the semiconductivity of the nanowire, and the finite length of the device profoundly affect both the total amount and the spatial distribution of induced charges in t...

We show a detailed investigation of the split Kondo effect in a carbon nanotube quantum dot with multiple gate electrodes. Two conductance peaks, observed at finite bias in nonlinear transport measurements, are found to approach each other for increasing magnetic field, to result in a recovered zero bias Kondo resonance at finite magnetic field. Surprisingly, in the same charge state, but under...

Experimental studies of the conductance properties of split-gate field-effect transistors have evidenced quantum wave guide effects for electron propagation through such structures.‘-3 Since then, a number of studies in such structures have been reported which have shown effects associated with resonant tunneling through impurities,4 superlattice effects due to a periodic grating,5 and single e...

This chapter describes a reconfigurable computing architecture based on clusters of regular matrices of fine-grain dynamically reconfigurable cells using double-gate carbon nanotube field effect transistors (DG-CNTFET), which exhibit ambivalence (p-type or n-type behaviour depending on the backgate voltage). Hierarchical function mapping methods suitable for the cluster of matrices structure ha...

We used an ensemble Monte Carlo simulator to study both the dc and transient behavior of a double gate silicon-on-insulator transistor sDGSOId operated as a velocity modulation transistor sVMTd and as a conventional field effect transistor sFETd. Operated as a VMT, the DGSOI transistor provides switching times shorter than 1 ps regardless of the channel length, with a significant current modula...

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